SoC 白盒IP设计

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May 23 - 24 Shenzhen

MIPI Controller DSI Tx IP


The MIPI Display Serial Interface (DSI) is an interface between a Display or other data interface and a host processor baseband application engine. This interface is defined by MIPI Alliance, which defines a series of modules in a MIPI compliant product. The MIPI DSI Receiver is used in mobile and high””speed serial applications as a controller for receiving video, command or user data transmitted using MIPI DSI Transmitter over MIPI lines. It is sent to the next higher level for subsequent processing. The MIPI DSI Receiver along with our MIPI DSI Transmitter and MIPI DPHY provides a complete solution for MIPI DSI communication.


  • Compliant with MIPI DSI Standard v1.2 and MIPI D-PHY Standard v1.1
  • Max 1.5 Gbps data transfer rate per Data Lane of DPHY. 6Gbps in 4 lanes.
  • Programmable 1, 2 or 4 Data Lane Configuration.
  • Forward and Reverse Communication
  • Configurable Virtual Channel up to 4
  • Operate in continuous and non-continuous clock modes.
  • Command and Video Mode are supported.
  • Burst and Non-Burst modes are supported.
  • Pulse and Event modes supported
  • Color Modes: 16, 18, 24 and 36 bpp


  • Highly modular and configurable design
  • Layered architecture
  • Active low async reset
  • Clearly de-marked clock domains
  • Extensive clock gating support


  • Design Guide
  • Verification Guide
  • Synthesis Guide
  • Configurable RTL Code
  • HDL based test bench and behavioral models
  • Test cases
  • Protocol checkers, bus watchers and performance monitors
  • Configurable synthesis shell
  • Documentation

T2M提供高质量的已验证IP,包括各种模拟/混合信号,RF,数字和SW系统的解决方案。可用于通信,消费类电子和计算机产品的关键组成部分,包括IoT系统,可穿戴设备,蜂窝电话,平板电脑,M2M,RCU,机顶盒,电视机,DVD播放器和PC芯片组。 无论是fab工厂的工艺 /节点的移植还是特定的系统功能,T2M所提供的IP可以进行设计定制化修改以适合客户的具体要求。