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SoC White Box IPs


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The CCM1 cores are tuned for mid-performance generic AES-CCM applications per NIST SP 800-38C.

Specific protocol implementations are available in integrated cores:

  • WPA2 for IEEE 802.11i (Wi-Fi)
  • CCM3 for IEEE 802.15.3 (UWB)
  • CCM3M for MBOA
  • CCM6 for IEEE 802.16e (WiMAX)
  • CCMZ1/2 for IEEE 802.15.4 (Zigbee)

CCM1 core uses flow-trough design with dedicated inputs for key and nonce. Cores contain the base AES core AES1 and are available for immediate licensing. The design is fully synchronous and available in both source (Verilog or VHDL) and netlist form.


  • From 10,000 ASIC gates for CCM1-8 configuration with 0.8 bits per clock throughput with 128-bit key
  • From 22,000 ASIC gates for CCM1-128 configuration with 12.8 bits per clock throughput with 128-bit key
  • Completely self-contained: does not require external memory
  • Supports encryption and decryption, Includes key expansion (scheduling)
  • Support for CCM mode of the AES cipher
  • Test bench provided
  • Benefits

  • The core can sustain the following peak throughput; depending on the configuration (performance is lower on shorter packets):
  • 0.8 to 12.8 bits per clock with a 128-bit key (e.g., 6.4 Gbps at 500 MHz clock)
  • 0.57 to 9.1 bits per clock with a 256-bit key (e.g. 4.5 Gbps at 500 MHz clock)
  • If higher throughput is required, use the CCM2 core, which if two times faster, yet is larger and has a lower maximum frequency.
  • Applications

  • Generic CCM-AES applications
  • IEEE 802.15.3 with 802.15.3 AES Core
  • IEEE 802.16e with 802.16e WiMAX AES Core
  • Deliverables

  • HDL Source Licenses
  • Synthesizable Verilog RTL source code
  • Verilog testbench (self-checking)
  • Vectors for testbench
  • Expected results
  • User Documentation
  • Netlist Licenses
  • Post-synthesis EDIF
  • Testbench (self-checking)
  • Vectors for testbench
  • Expected results

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