Select Language

SoC White Box IPs

DVB T-C Reciever

OverviewFeaturesRequest Datasheet

Please fill in the form below

OverviewFeaturesRequest Datasheet

Please fill in the form below

OverviewFeaturesRequest Datasheet

Description

iH412 system-on-chip, belonging to its new 'Monaco' family, provides a full-featured solution for multi-HD and UHD IP set-top boxes, and server-box applications. This SoC supports integrated broadcast and broadband services, combined with the latest set-top box middleware and broadband software solutions.

Faroudja® Transcode Engine provides best in-class transcoding capabilities for multi-screen streaming across consumer and handheld devices. This allows operators to optimize network bandwidth, while offering an excellent quality of service throughout the home.

The iH412 supports HEVC decoding, and therefore permits operators and service providers the means to offer UHD content to their customers.

Features

  • Dual core SMP ARM® applications CPU plus a quad-core GPU for true 3D graphics
  • Ultra HD decoding up to 2160p30 OR HEVC, combined with Faroudja® video processing technology
  • Faroudja® video transcoding engine
  • Advanced security supporting concurrent conditional access and DRM, to protect premium broadcast content
  • Wide connectivity, including USB 3.0, PCI-e, SATA and Gigabit Ethernet
  • Dedicated interfaces to a range of companion front-end solutions, including MoCA 2.0, DOCSIS 3.0, satellite and 802.11ac WiFi devices
  • 28 nm process technology chip
  • Benefits

  • Silicon Proven
  • Deliverables

  • Verilog Source RTL Code plus Simulation Environment
  • Source Code
  • Physical Design scripts - Synopsys synthesis
  • Hardware simulation test bench with regression test suit
  • Reference platform drivers

Please fill in the form below

OverviewFeaturesRequest Datasheet

Description

This satellite tuner is a direct-conversion (zero IF) receiver for digital TV Broadcasting. On the RF input, there is a variable gain, low-noise amplifier (VGLNA). The RF gain is monitored by an automatic gain control (AGC) circuit to ensure an optimal signal level for the two mixers. Each mixer, which down-converts the signal to the baseband, is followed by an AGCcontrolled VGA, a low-pass filter and a second VGA. The local oscillator (LO) signals are provided by an integrated fractional-N phase locked loop (PLL), which contains an on-chip voltage-controlled oscillator (VCO) meeting stringent phase noise requirements. The PLL loop filter is partly integrated. The LO frequencies are programmable between 950 MHz and 2150 MHz. The comparison frequency for the phase-frequency detector (PFD) is generated by dividing the crystal oscillator reference frequency. The crystal frequency may be within the range 15 MHz to 31 MHz depending on the application.

1476518193tuner6111

Features

  • High volume production proven in leading STBs
  • RF-to-Baseband direct conversion architecture
  • Single 3.3-V DC supply, low consumption
  • Outstanding performance in heavily loaded spectrum conditions
  • Input frequency range: 950 to 2150 MHz
  • Supports 1 to 60 Msymb/s using internal filter
  • Specific operating mode for symbol rates up to 220 Msymb/s
  • RF-AGC or channel-AGC support
  • Extremely low-phase noise, compliant with DVB-S2 requirements using fractional-N Synthesizer
  • Low external component count
  • Flexible crystal frequency output to drive the demodulator and/or other tuner ICs
  • Continuously variable gain
  • Programmable 6 to 50 MHz cut-off frequency (Butterworth 5th-order baseband filters)
  • Compatible with 5-V and 3.3-V I2C bus
  • Applications

  • Direct broadcasting satellite (DBS), satellite modems: BPSK, QPSK, 8PSK, 16/32 APSK modulations
  • Input frequency range: 950 to 2150 MHz
  • Extremely low-phase noise, compliant with DVB-S1 and DVB-S2
  • Set-top boxes, PCTV and iDTV
  • Outdoor units
  • Deliverables

  • White Box IP – source Code delivery
  • RTL source code
  • Software source code
  • Technical documents
  • Test vectors and simulation model
  • Host emulation test environment
  • Porting & Integration support

Please fill in the form below

OverviewFeaturesRequest Datasheet

Please fill in the form below

OverviewFeaturesRequest Datasheet

Please fill in the form below

OverviewFeaturesRequest Datasheet

Description

The iC2BB Baseband/RF IC and iC2PA Power/low-noise amplifiers IC companion chips connect back-end devices to the home MoCA network as defined by the MoCA standard specification v2.0.The chip set is fully backward compatible with MoCA v1.1 standard ( device VMOCA).

iC2BB is interfaced via RGMII to back-end devices such as iD128 or iH410.

The chip set comes with a complete firmware and software suite included in a product design kit.

1476521215moca2-0bb

Features

  • iC2BB Baseband/RF IC features
  • MoCA v2.0 device with backwards compatibility to MoCA v1.x
  • Wide frequency range covering all MoCA 2 bands
  • Turbo mode capable
  • Reduced Gigabit MII (RGMII)
  • I2C bus control
  • 3.3-V, 2.5-V and 1.2-V supplies
  • VQFPN 13 x 13 mm2 dual row package with exposed pad down OR White Code
  • Temperature range 0 to 70 °C
  • Audio/video
  • Channel 3/4 A/V modulator
  • I2S digital audio input
  • Digital video input (DVI)
  • Channel 3/4 RF output
  • iC2PA Power/low-noise amplifiers IC
  • Supports the MoCA v1.x and v2.0 standards
  • Frequency range 400 to 1675 MHz
  • Common input/output of LNA and PA
  • High speed LNA/PA gain control interface
  • Low external component count
  • Single 3.3-V DC supply
  • Low power consumption
  • VFQFPN-24 4x4x1mm3 with exposed pad down (EPD) for heat dissipation
  • Temperature range 0 to 70 °C
  • Deliverables

  • Data Sheet of production Chip
  • Production Test Program
  • Source Code
  • EVKs with production chip on
  • Full design Data Base

Please fill in the form below

OverviewFeaturesRequest Datasheet

Description

This SOC white box IP extracted from the production chip.The MoCA (Mutimedia Over Cortex Allience) Baseband PHY and Mac SoC, in conjunction with the companion chip power amplifier and low noise amplifier for MoCA, connects STB back-end devices to the home MoCA network as defined by the MoCA 2.0 standard. The MoCA Baseband PHY and Mac is fully backward compatible with MoCA 1.1 standard Supporting Bonded-channel and Turbo modes, offers a high-speed throughput from 400 Mb/s to 1 Gb/s.

The MoCA Baseband PHY and Mac and Power amplifier can be used as well in standalone applications like Dongles or host. The device comes with a complete firmware and software suite included in a Product design kit.

1476521215moca2-0bb

Features

    MoCA 2.1

  • Throughput: 400 Mb/s, 500 Mb/s in turbo mode
  • Single channel
  • Throughput: 800 Mb/s, 1 Gb/s in turbo mode
  • Bonded channel
  • Wide frequency range: 400 MHz to 1675 MHz
  • Covering all MoCA bands
  • Up to 16 nodes
  • MoCA1.1 backward compatibility
  • Dual independent radios for max. flexibility
  • Low power modes and wake-on-MoCA
  • Control via host AP
  • Interfaces

  • Reduced Gigabit MII (RGMII)
  • 50-MHz oscillator control
  • Dual MoCA 2.0 100-Ω differential ZIF RF I/Os
  • Proprietary PA/LNA control
  • I2C master and slave
  • I2S digital audio input
  • General

  • 3.3-V, 2.5-V and 1.2-V supplies
  • Single-channel peak power < 2.5 W
  • Bonded-channel peak power < 3.5 W
  • Temperature range 0 to 70 °C
  • Applications

  • Set Top Box, OTT, iPTV
  • Cable Gateways
  • DOCSIS 3.1/3.0 cable modems
  • Deliverables

  • RTL Source Code
  • HDL based test bench and behavioral models
  • Test cases
  • Protocol checkers, bus watchers and performance monitors
  • Configurable synthesis shell
  • Documentation & Design Guide
  • Verification Guide
  • Synthesis Guide

Please fill in the form below

OverviewFeaturesRequest Datasheet

Description

This SOC white box IP extratxted from the production chip its integrates a power amplifier (PA) and a low noise amplifier (LNA) so that it can transmit and receive, in half duplex mode, the RF MoCA-2 signal to the F connector. By merging, from the F-connector side, LNA input and PA output and, from the transceiver side, PA input and LNA output, the PA avoids transmit/receive switching and reduces the external components thereby facilitating its integration in the application. 1476521534moca_power_amp

Features

  • Common input/output of LNA and PA
  • Single 3.3-V DC supply
  • Frequency range from 400 to 1675 MHz
  • High-speed LNA/PA gain-control interface
  • Low external component count
  • Low power consumption (1.3 W typical in PA mode, 0.13 W typical in LNA mode)
  • Temperature range, 0 °C to 70 °C
  • Compatible with 2.5-V and 3.3-V control signals
  • Supports the MoCA-1.0, 1.1 and 2.0 standards including channel bonded mode
  • Applications

  • Set Top Box, OTT, iPTV
  • Cable Gateways
  • Deliverables

  • HDL based test bench and behavioral models
  • Test cases
  • Protocol checkers, bus watchers and performance monitors
  • Configurable synthesis shell
  • RTL Source Code
  • Documentation & Design Guide
  • Verification Guide
  • Synthesis Guide

Please fill in the form below

OverviewFeaturesRequest Datasheet

Description

The iD325 is next generation DOCSIS® 3.1 device for data gateway applications. It can also be used as cable modem, eMTA (embedded Media Terminal Adapter) or as a front-end device for headed cable multimedia gateway applications.

The iD325 is built around a multi-Gigabit DOCSIS® 3.1 modem fully certifiable by Cable Labs® with full DOCSIS 3.0 backward compatibility. Besides DOCSIS modem, it embeds line-rate hardware-accelerated switching, routing, Wi-Fi bridging and a carrier grade telephony engine.

The iD325 is powered by a powerful multi-core 64-bit ARM CPU and comes pre-integrated with a RDK-B software allowing OEM to deliver and customize efficiently advanced and future proof CPE (Customer Premises Equipment) solution to MSO's (Multiple System Operators).

Using innovative 28 nm FD-SOI silicon technology, the iD325 provides a cost-effective path for operators towards large-scale deployments.

Features

  • Multi-core 64-bit ARM® Cortex™ CPU offering greater than 10 K DMIPS.
  • DOCSIS® 3.1 cable modem: – Two 196-MHz OFDM demodulators for DOCSIS 3.1 downstream & upstream channels, 32 single-carrier QAM demodulators for DOCSIS 3.0 downstream, 8 single-carrier QAM modulators for DOCSIS 3.0 upstream channels
  • Hardware-accelerated L3 / L4 router and L2 switch providing line-rate networking on every port – Rich number of interface for WAN / LAN / Wi-Fi connection – Wi-Fi bridging for deployment of dual-band concurrent Wi-Fi (2.4 GHz and 5 GHz)
  • Telephony support: – PacketCable™ 1.5 / 2.0 with Up to 4 carrier grade HD voice lines
  • Secure boot with hardware-accelerated cryptographic engine and security hardening
  • Deliverables

  • Technical Documents
  • RTL codes with test bench
  • Software Source Code
  • Integration Support

Please fill in the form below

OverviewFeaturesRequest Datasheet

Please fill in the form below

OverviewFeaturesRequest Datasheet

Description

This DVB-T/T2 Demodulator IP supports all the new terrestrial specifications, including Rotated constellations, Alamouti, TFS and multiple PLP. Its performance meets or exceeds the most recent requirements. The IP features dual I/Q ADC's. It can work with different external RF tuner chips and CAN tuners thanks to a highly flexible RF interface and a dedicated programmable block. dvbt-t2

Features

  • Compliance with DVB-T2 standard
  • 1k, 2k, 4k, 6k, 16k, 32k FFT sizes.
  • 1/32, 1/16, 1/8,1/4, 1/128, 19/128, 19/256 Guard Intervals.
  • All Pilot Patterns PP1--?PP8.
  • By PLP code rates: 1/2, 3/5, 2/3,3/4 4/5, 5/6.
  • Constellations: QPSK, 16 QAM, 64 QAM, 256 QAM.
  • 16K and 64K LDPC
  • P1, P2, L1 and L2 reception and decoding.
  • Channel bandwidths: 1.7 MHz, 5MHz, 6 MHz, 7MHz, 8MHz
  • Output
  • Benefits

  • Silicon proven
  • Used in millions of devices
  • Deliverables

  • Verilog Source RTL Code plus Simulation Environment
  • C Source Code
  • Physical Design scripts - Synopsys synthesis
  • Hardware simulation test bench with regression test suit
  • Reference platform drivers

Please fill in the form below

OverviewFeaturesRequest Datasheet

Description

DVB-T/T2/C/S2 IP is a highly optimized multi standard DVB-T/T2/C/S/S2 Decoder solution designed for next generation satellite, cable and terrestrial digital television reception. DVB-T/T2/C/SS2 IP converts demodulated I/Q signals into a bit stream for use by the video decoder. This includes all de-interleaving, FEC decoding and output processing. dvbtss2

Features

  • DVB-T2 demodulation:
  • Compliant with ETSI EN-302755 v1.2.1
  • DTG7 v3 and Nordig Unified v2.4 compliant
  • 1.7, 5, 6, 7 and 8 MHz normal and extended BW signals supported
  • GS streams, FEF and MISO supported
  • DVB-T demodulation:
  • Compliant with ETSI EN-300744 v1.5.1
  • DTG7 v3 and Nordig Unified v2.4 compliant
  • 6, 7 and 8 MHz BW supported
  • DVB-C demodulation:
  • Compliant with ETSI EN300429
  • Nordig Unified v2.4 and SARFT compliant
  • Up to 7.2 Ms/s symbol rate
  • DVB-S and S2 demodulation:
  • Compliant with ETSI EN300421 and
  • EN302307
  • Symbol rates from 1 to 45 Ms/s
  • Enhanced FEC for DVB-S and DirecTV legacy transmissions
  • DVB-T/T2 and DVB-C compatible with zero-,high- and legacy-IF tuners (CAN or silicon)
  • DVB-S/S2 compatible with zero-IF tuners (CAN or silicon)
  • Embedded microcontroller (DVB-T2 task sequencing by firmware and monitoring)
  • ADC for RF signal strength indicator
  • Flexible clock management for advanced power saving
  • JTAG and I?C serial bus interfaces
  • I2C repeater for private tuner communications
  • Advanced low-power CMOS process
  • 3.3-V, 2.5-V and 1.1-V power supplies with internal SMPS for 1.1-V generation
  • Typical power consumption 912 mW (DVB-T2 mode)
  • TQFP80 10x10x1 mm3 package with EPD
  • Benefits

  • Error correction capabilities - Robustness
  • Error concealment capabilities - Quality
  • Compliance to Allegro reference streams
  • Deliverables

  • Verilog Source RTL Code plus Simulation Environment
  • C Source Code
  • Physical Design scripts - Synopsys synthesis
  • Hardware simulation test bench with regression test suit
  • Reference platform drivers

Please fill in the form below

OverviewFeaturesRequest Datasheet

Please fill in the form below

T2M's range of high quality pre-verified, analog/mixed-signal, RF, Digital and SW system solutions, are used as critical building blocks of communications, consumer and computer products including IoT, Wearables, cellular, tablet, M2M, RCU, set-top boxes, TVs, DVD players and PC chipsets. IPs can be modified to meet the customer's specific requirement be it fab/node porting or proprietary features.