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Your Complex IP Core Partner


    BLE ExpertiseDesign ExpertiseVerification Expertise

    From chip design to board design we help provide the talent and capacity for new product development, shorten time to market, increase derivative portfolio and drive revenue.
    Key Areas of Association:

    • Chip selection support for Customers
    • Customized Bluetooth Stack implementation
    • Development board design for Bluetooth manufacturers
    • Post silicon validation services for BLE OEMs
    • Toolchain development. Architecture porting
    • Support New profiles to existing Bluetooth
    • Board bringup
    • Device driver development and Testing
    Why Us?
    • Strong domain knowledge in Wireless, Automotive, Multimedia domains
    • We have deep system level knowledge of all profiles of Bluetooth
    • Cost advantage and leverage world class expertise
    • C, Embedded C, ARM9, Cortex, and others
    • GCC, Cross Toolchain, Makefile
    • Lauterbach, Trace 32, JTAG
    • IAR, Code Composer Studio, UVision and others
    • Helping customers to get different Bluetooth Certifications as per their need
    • RTOS framework development, FreeRTOS, ThreadX, uITRON and others
    Board Design and Bring up Expertise
    • Designed development board for multiple Bluetooth versions
    Porting and Profile Development Expertise
    • Architecture porting for blueZ stack to multiple linux kernel version.
    • Developed new profiles to existing Bluetooth application on multiple stacks.
    • Developed a SDK for Bluetooth to support multiple RTOS framework.
    Optimization Expertise
    • Memory optimization support for existing Bluetooth stack for a US based OEM.
    • Power optimization, performance bench-marking, test cases automation for a BLE chip manufacturer.
    Tools Expertise
    • JTAG, test cases automation using Lauterbach and Jenkins, GIT, IAR, Code composer studio, Code profiling. Python based automation.
    Post Production Support Expertise
    • Bug fixing, Code maintenance, Long term support.

    We provide expert custom design resources having many years of experience in designing complex Analog circuits, memory design and standard cell libraries. The team has unique expertise to do re-characterization of memories and standard cells manually and suggest optimizations in the compiler designed memories and removing the pessimism from tool generated library timing numbers. Layout migration to lower technology nodes is our other unique offering.

    Key Areas of Association:

    • Memory Characterization
    • Customized Block and full chip Layout
    • IO Design
    • Standard Cell Design
    • Physical design
    • High Speed interface
    • Porting across different nodes
    • Physical verification and GDSII Sign-off
    • Validation & Quality Assurance

    • Why Us?
    • Library Design, Characterization and Re- Characterization
    • Memory Layout, Design, Memory characterization and re-characterization
    • Strong expertise in chip to chip communication IP Integration & Verification

    • Layout design of Analog, Memory and Digital Cells in Lower technology Nodes
    • Circuit Design and Circuit simulations
    • Layout Migration, Technology Migration
    • Re-characterization of existing libraries, Memories and Analog Blocks
    • New design of regulators, ADC’s, DACs, SERDES etc.
    • TCL, PERL, Makefile, Automation of Timing Flows, Layout Migration

      Analog Design
    • Voltage Regulators (Linear/Buck regulator)
    • HDMI Transmitter

    • Memory Expertise
    • Development of a Dual Port (2 Read ports, 2 write ports) SRAM
    • Development of a Low Power Single Port SRAM & ROM Memory NVM
    • Re-Characterization of Compiler generated Memories (SRAM, ROM, DPRAM)

    • Standard Cell Expertise
    • Design and development of complete ultra-low leakage library
    • Re-Characterization of 110nm Library to optimize speed

    • Tools Expertise All Industry Standard Tools: Cadence Virtuoso, Schematic Editor, Spectre, Calibre, Xcalibre, ELDO, FINSIM, HSPICE, HSIM, NanoSim, Cadence ADE, Mentor Graphics IC Station, Star-XT

    • CDL Netlist
    • GDSII
    • LEF File
    • .LIB Files
    • Detailed signed checklist
    • Simulation Models/ Front End Models
    • Validation Report
    • Environment Automation Scripts
    • Datasheet/ Documentation
    • Tool Database

    We provide expert verification Services to worldwide customers in Wireless, Automotive, Networking domains. We have strong expertise in integration & verification of Memory controllers, Communication protocols, Wireless IPs/SoCs at ASIC/FPGA level. Our team has strong expertise in latest UVM/OVM based verification flows.

    Key Areas of Association:

    • IP Verification
    • SOC Verification
    • Automation of Legacy Verification Environment
    • Migration to System Verilog Based Testbench
    • System Level Verification (Use case verification)
    • VIP Development
    • CPU Verification & Validation
    • Gate Level SOC Verification
    • FPGA Prototyping & Validation
    • Silicon Validation, Chip bringup,
    • Device driver development and Testing

    • Why Us?
    • Strong domain knowledge in Wireless, Automotive & Networking domains
    • Deep system level knowledge of all kind of memory controllers integration & Verification.
    • Strong expertise in chip to chip communication IP Integration & Verification

    • System Verilog, Verilog, VHDL
    • UVM, OVM, VMM,
    • C based SOC Verification
    • TCL, PERL, Makefile, Automation of complete SOC
    • SVA (System Verilog Assertion) based Verification for Protocol Compliance
    • Coverage Driven Verification, Constrained Random Verification
    • Black box Verification, (Verification without golden Specification)

      SOC Expertise
    • Design and Verification DVB-H/T, Pay TV Conditional Access chip sets
    • Design and Verification of Automotive/Networking chip Sets
    • Design and Verification of Wireless (2G,3G, 4G) GSM based chip
    • Design and Verification of Bluetooth low energy SOC (Ultra Low Power)
    • Design and Verification of Hearing Aid Microcontroller (Ultra Low power)

    • IP Expertise LPDDR2, RLDRAM 2/3, Flash Memory, Flash Security, UFS 2.0, MIPI M-PHY, UNIPRO, Interlaken, Ethernet, USB 2.0, USB 3.0,Power Management, DCDC Controller,Reed Solomon, AES, SHA, DMA, USART, I2C, SPI, GPIO, IOMUX, Modem, Audio Codec, Clock & Reset, Viterbi, IR Receiver, WDOG, PWM, ARM,ARC, MIPS Processors, Cache, MMU...

      Bus Interfaces AXI 3.0, AHB System, APB, Wishbone

      Tools Expertise All Industry Standard Tools: Synopsys (VCS & DVE, Formality, Spyglass), Cadence (ncSIM & Simvision, Conformal, HAL Check) Mentor Graphics ( Questa Sim & vsim)

    • Verified Design Specification
    • Detailed test guide
    • Detailed Test plan & test strategy
    • Verified RTL
    • Detailed signed checklist
    • Reusable UVM based Testbench (VIP)
    • Self Testing Direct, Random testcases
    • Environment Automation Scripts
    • Functional Coverage Report
    • Code Coverage report
    • Formal Equivalence, Spyglass Check