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    USB 2.0 Host (xHCI) Controller IP

    OverviewFeaturesRequest Datasheet
    The USB2.0 host controller is a highly integrated and cost-effective IP that contains a USB2.0 PHY, the USB2.0 PHY is used for High-Speed (HS), Full-Speed (FS), and Low-Speed (LS) transfers. Following the trend of green technology design, low power technique is also implemented in this IP  
    • USB2.0 Host Controller :
    • One/Two downstream USB ports for High-Speed (HS) / Full-Speed (
    • FS) / Low-Speed (LS) host mode
    • One EHCI USB2.0 Host Controller for HS data transfer, compliant
    • with EHCI Specification Rev 1.1
    • One OHCI USB1.1 Host Controller for FS/LS data transfer,
    • compliant with OHCI Specification Rev 1.0a
    • USB2.0 PHY :
    • Compliant with USB 2.0 specification, Revision 2.0
    • Supports High-Speed (480Mbps), Full-Speed (12Mbps) and Low-
    • Speed (1.5Mbps) serial data rates
    • Embedded 45ohm High-Speed termination, 1.5kohm Full-Speed
    • device pull-up resistor, 15kohm pull-down resistors
    • Embedded Phase-Locked Loop (PLL) for 480MHz High-Speed USB
    • operations
    • Embedded internal RREF for reference current trimming function
    • Embedded HV protection circuit

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