MIPI-LLI-IP – Description


LLI is a Low Latency Interface which is a point-to – point interconnect that allows two devices on separate chips to communicate as if a device attached to the remote chip is resident on the local chip.The connection between devices is at their respective interconnect level, eg: OCP,AMBA protocols, using memory mapped transactions. LLI is a bidirectional interface and is primarily targets low – latency cache refill transactions.LLI is a layered , transaction level protocol where Targets and Initiators on two linked chips exchange transactions without software intervention.Software is used only to configure and initialize LLI stack. MPHY is the PHY layer to transfer the symbols across chips connected through LLI protocol.Upto 12 lanes per direction can be used which would provide a very high speed serial data transfer across chips.