HDMI v1.4b Receiver – Description

Description

The HDMI Receiver IP provides an integrated functionality to interface with an HDMI compliant source and extract the corresponding video and audio signals. HDMI RX IP design provides a solution for organizing receiving data from link in accordance with DVI/HDMI1.1/HDMI1.2/HDMI1.3/HDMI1.4 with 3D interfaces and HDCP 1.4. IP is composed of HDMI v1.4 core and Physical Layer, in 65nmLP and 28nmLP.
Video: Full support for CEA 861 & HDMI 1.4b
Audio: All formats including Compressed, HBR & 1 bit audio
Data: Reception of standard
Supports Combo PHY (Display Port or HDMI) that de-serializes up to 3 gbps input. Maximum output speed is 240 MHz
Supports TMDS PHY (HDMI only input) that de-serializes up to 2.25 gbps input. Maximum output speed is 562.5 MHz
Link rate from 25MHz to 165MHz (DVI/HDMI1.1), up to 225MHz for HDMI1.3/1.3a and up to 297MHz for HDMI1.4
Option of 1:1, 2:1, 3:1 and 4:1 Mux
Cable equalizer and integrated line impedance matching per channel
Supports 3D video timing up to 1080P 60fr/Eye
RGB/YUV444/YUV422 color spaces; xv YCC support All possible color depth as HDMI 1.4
Automatic video/audio type detection and mute generation for excepted conditions
Up/Down color depth dithering at the video output
Automatic video screen blocking by programmed background color during video mute
Internal image format measurement block