USB 2.0 Audio Class Device Controller IP
OverviewFeaturesRequest Datasheet
The USB 2.0 Audio Design platform is a complete ,integrated solution designed to be used in USB based Audio Devices such as speaker and microphones. This includes USB2 peripheral controller designed to support 12 Mb/S full speed and 480 Mb/S high speed serial data transmission rates. DP8051XP ultra high performance ,speed optimized fully customizable 8051 8 bit microcontroller with built in debug IP core. Audio device stack optimized software for DP8051XP 8bit CPU. FPGA board with ready to use , pre programmed example USB stereo speakers applications. Supports UTMI Transceiver Macro cell interface.
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- Full compliance with the USB 2.0 specifications
- Full speed 12 Mbps operation
- High speed 480 Mbps operation
- Suspend and resume power management functions
- 100% software compatible with 8051 industry standard
- Upto 256 bytes of internal data memory
- Up to 64k bytes of internal or external program Memory
- User programmable program memory wait states solution for wide range of memories speed
- User programmable External data memory wait state solution for wide range of memories speed
- Fully synthesizable, static synchronous design with positive edge clocking and no internal tri states
- Scan test ready
Benefits
- Can be dynamically configured to support configurable number of endpoints, alternate interfaces, and configurations.
- Has full support for all low power features of the USB Specification supporting Suspend and Remote Wakeup, USB 3.1 Low Power States – U1/U2/U3 and USB 2.0 Link Power Management states – L1, L2.
- Has multiple power domain support as specified in the Audio 2.0 Specification.
Applications
- Smart YV
- Mobile
- Consumer
- Automotive
- Verilog RTL Source Code
- Verification Environments
- Test benches
- Test cases
- Synthesis Environments
- Scripts
- Constraints
- Clock Domain Crossing Environments
- Scripts
- Constraints
- Waivers
- Lint Environments
- Scripts
- Waivers
- Design Data book
- Verification Documents – Test Environment Specification, Acceptance Test Specification
- Synthesis Guide