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    DVB-S2X-LDPC Decoder IP

    OverviewFeaturesRequest Datasheet

    In Digital video broadcasting for digital transmission for satellite applications, a powerful FEC sub-system is needed. FEC is based on LDPC (Low-Density Parity Check) codes concatenated with BCH (Bose Chaudhuri Hocquenghem) codes, allowing Quasi Error Free operation close to the Shannon limit.

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    • Irregular parity check matrix coding
    • Layered Decoding
    • Minimum sum algorithm
    • Soft decision decoding
    • ETSI EN 302 307-2 V1.1.1 compliant
    • Long, medium, and short codeword lengths are supported (16200, 32400 and 64800 bits)
    • All code rates of EN 302 307-2 V1.1.1 standard are supported
    • Synthesizable Verilog
    • System Model (Matlab) and documentation
    • Verilog Test Benches
    • Documentation
    • Improved performance
    • Improved efficiency w.r.t. Shannon's limit
    • Finer gradation of code rate and SNR
    • Very high data rate
    • Maximum service availability at highest efficiency
    • Enables cross layer optimization

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