This Ultra Low Power GNSS Multi-Constellation Digital IP is extracted from a production chipset supporting all the major constellations including GPS, GALILEO, GLONASS, Beidou3, QZSS, IRNSS / NAVIC. The Digital IP supports simultaneous multi-band L1/E1, and L5/E5 concurrent signal reception when connected to a suitable RF receiver. The Navigation Engine and control functions are implemented using an integrated ARM Cortex M4F processor. This architecture allows for a fully integrated GNSS solution supporting remote firmware updates. The receiver handles up to 128 channels; configurable to 64 channels to save power with an optional support to the cloud for higher accuracy and sensitivity. The Ultra-Low power GNSS Multi-Constellation Digital IP core is available for integration into customer’s SoC for IoT and Wearable applications such as Smart watches, fitness tracker, smart-bands, GPS trackers etc. The GNSS Digital IP core offers a very small die-size area along with the lowest power consumption at 6.5mW in L1/ L5 mode. The GNSS IP core is highly SW configurable to support any of the legacy, modernized and potential future GNSS signals of all available constellations, concurrently or sequentially based on the need of the application.
The Ultra-low power GNSS Digital-IP core when coupled with other wireless technologies such as NB-IOT, Bluetooth, WiFi can further enhances the capabilities of wearable products and IOT asset tracking products. T2M carries a comprehensive range of system level semiconductor IP to complete any complex GNSS SoC, including:
