MIPI Unipro v1.6 Controller IP
- Wireless
- Bluetooth/BLE
- BLE
- Bluetooth
- BT Dual Mode v5.2 RF PHY IP in TSMC 22nm
- BT Dual Mode v5.2 RF PHY IP in GF 22fdx
- BT Dual Mode 5.2 HW Linklayer / BaseBand Controller IP
- BT Dual Mode v5.2 Software Stack & Profiles IP
- BT Dual Mode v5.0 Software Stack & Profiles IP
- Bluetooth MESH v1.1 Software IP
- Bluetooth Dual Mode v4.2 RF Transceiver IP
- Bluetooth Dual Mode SoC White Box IP
- LE Audio
- Cellular
- Audio
- Broadcast
- Lighting
- SerDes
- Memory
- DDR
- PCI Express
- USB
- Controllers
- USB 4.0 Device Controller IP
- USB 4.0 Host Controller IP
- USB 4.0 Hub Controller IP
- USB 3.2 Device Controller IP
- USB 3.2 OTG Controller IP
- USB 3.2 Dual Mode Controller IP
- USB 3.1 Device Controller IP
- USB 3.1 Host Controller IP
- USB 3.1 Hub Controller IP
- USB 3.1 Vision Controller IP
- USB 3.1 Gen1 SSIC Controller IP
- USB 3.0 Device Controller IP
- USB 3.0 Host Controller IP
- USB 3.0 Hub Controller IP
- USB 3.0 Dual Mode Controller IP
- USB 3.0 OTG Controller IP
- USB 3.0 Audio Class Device Controller IP
- USB 2.0 Device Controller IP
- USB 2.0 Host (xHCI) Controller IP
- USB 2.0 Audio Class Device Controller IP
- USB 2.0 OTG Controller IP
- USB 1.1 Device Controller IP
- TSMC 16FF+
- TSMC 22ULP
- TSMC 28HPC+
- TSMC 40LP /LL
- UMC 28HPC+/ HPC
- UMC 40LP
- UMC 55SP /EF
- SMIC 14SF+/ SF++
- SMIC 40LL
- SMIC 55LL
- Controllers
- MIPI
- Controllers
- MIPI UFS v3.1 Device Controller IP
- MIPI UFS v3.1 Host Controller IP
- MIPI UFS v2.1 Host Controller IP
- MIPI CSI-3 Device v1.1 Controller IP
- MIPI CSI-3 Host v1.1 Controller IP
- MIPI CSI-2 Tx v2.0 Controller IP
- MIPI CSI-2 Rx v2.0 Controller IP
- MIPI CSI-2 Rx v1.3 Controller IP
- MIPI CSI-2 Tx v1.3 Controller IP
- MIPI CSI-2 Tx v1.1 Controller IP
- MIPI CSI-2 Rx v1.1 Controller IP
- MIPI DSI2 Tx v1.1 Controller IP
- MIPI DSI2 Rx v1.1 Controller IP
- MIPI DSI Tx v1.2 Controller IP
- MIPI DSI Rx v1.2 Controller IP
- MIPI Unipro v1.8 Controller IP
- MIPI Unipro v1.6 Controller IP
- MIPI I3C Slave v1.1 Controller IP
- MIPI SoundWire Master v1.2 Controller IP
- MIPI SoundWire Slave v1.2 Controller IP
- MIPI RFFE Master Controller IP
- MIPI RFFE Slave Controller IP
- TSMC 12FFC
- TSMC 22ULP
- TSMC 28HPC+
- UMC 28HPC+
- UMC 40LP
- UMC 55 SP
- SMIC 55 LL
- Controllers
- HDMI & DP
- TSMC 12FFC
- TSMC 28HPC+
- HDMI v2.1 Tx-Rx Phy & Controller IP
- HDMI v2.1 Tx PHY & Controller IP
- HDMI v2.1 Rx PHY & Controller IP
- HDMI v2.0 Tx PHY & Controller IP
- HDMI v2.0 Rx PHY & Controller IP
- HDMI-DP Combo Rx PHY IP
- Display Port v1.4 Tx PHY & Controller IP
- Display Port v1.4 Rx PHY & Controller IP
- V-by-One / LVDS Tx IP
- V-by-One / LVDS Rx IP
- TSMC 40LP
- TSMC 65LP / 55LP
- TSMC 65GP / 55GP
- TSMC 90G / 85G
- TSMC 130G / 110G
- UMC 28HPC/HPC+
- UMC 40LP
- UMC 65SP / 55SP
- UMC 110AE
- UMC 130HS
- SMIC 40LL
- SMIC 65LL / 55LL
- SMIC 65G / 55G
- GF 22nm
- GF 28SLP
- GF 65LPe / 55LPe
- Samsung 28FDSOI
- STMicro CMOS 40
- IDM 180nm /150nm
- Ethernet
- Video & Graphics
- Analog
- Peripherals
- Services
OverviewFeaturesRequest Datasheet
UniPro (Unified Protocol) is a layered protocol defined by the MIPI Alliance for connecting devices and components within a mobile device. UniPro allows device components to utilize MIPI PHY layer to communicate and exchange data with devices on the other side of MIPI lanes. UniPro supports a wide range of device applications like application processor, camera controller, display controllers, and storage controllers like UFS or memory (RAM) controllers. Our MIPI UniPro is designed to be PHY-agnostic, supporting a wide range of applications simultaneously in the application layer. Our MIPI UniPro along with other application solutions like CSI-3 or UFS and MPHY offers an comprehensive solution.

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- Compliant with MIPI UniPro Standard V1.6 and MPHY standard 3.x
- Programmable 1, 2, or 4 data lanes
- Support for M-PHY HS data rates HS-Gear-1, Gear-2, Gear-3, both A/B modes and PWM data rates PWM-G1 to PWM-G7
- Support for end-to-end flow control
- Support for all traffic classes
- Support for preemption of high-priority frames
- Support for up to 32 C-Ports
- Round Robin arbitration across C-Ports
- Group acknowledgement of up to 16 frames per traffic class
- Support for frame retransmission
- Configurable buffer spaces
- CSD, CSV support
- Support for UniPro test feature
- TMPI support
- Efficient power management
- Configurable RTL Code
- HDL based test bench and behavioral models
- Test cases
- Protocol checkers, bus watchers and
- Performance monitors
- Configurable synthesis shell
- Design Guide
- Verification Guide
- Synthesis Guide
Benefits
- Highly Modular and scalable design
- Active-low
- Asynchronous reset
Applications
- IOT
- Automotive
- Storage
- Consumer
- Embedded
- Enterprise