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ATSC3 Demodulator IP

OverviewFeaturesRequest Datasheet

Fully compliant with A/321 and A/322 ATSC3.0 standard -Support FDM / TDM / LDM -Maximum 64 PLPs (with extra TINT memory) Leading all three plug-fest test with our equipment's -1st : 2015.11, Sanghai, China -2nd : 2016.3, Baltimore, US -3rd : 2016.10, Jeju, Korea (we host this with ETRI)

Features:

    • Tested in real broadcasting environment.
    • KBS/MBC/SBS are using our equipment for field-measurement
    • Conducted field test several times with MBC/SBS
    • Conducted a plug-fest lead by government institution with KBS
    • Well balanced S/W and H/W partitioning
    • Easy to upgrade or add new feature
    • Cortex M3 are sufficient to control
    • Very highly optimized
    • Fitted in single mid-sided FPGA(Virtex7 690T)
    • Single port ram are mainly used for silicon area
    • Ready to ASIC
    • Not using any other IP
    • Need only memory conversion to ASIC
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