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    USB 2.0 PHY

    OverviewFeaturesRequest Datasheet

    The USB 2.0 PHY will be a UTMI+ Low Pin Interface (ULPI) and UTMI+L3 Universal Serial Bus (USB) transceiver that will be fully compliant with : Universal Serial Bus Specification On-The-Go Supplement to the USB 2.0 Specification UTMI+ Low Pin Interface (ULPI) Specification Battery Charging Specification The USB2PHY_C040LP will transmit and receive USB data at High speed (480 Mbit/s), Full speed (12 Mbit/s), Low speed (1.5 Mbit/s). This is a USB physical layer IP which offers Single Data Rate (SDR) ULPI interface towards either host, Peripheral or OTG controller. It can also be configured to provide 8 bit UTMI + L3 interface towards UTMI controller. While configured for UTMI+L3 interface mode, it also offers LS/FS serial interface USB 2.0 PHY also supports UART mode signaling.



      Features Serial Interface
      • USB 2.0 data transfer rates
      • Standard 480 Mbps HS, 12 Mbps FS and 1.5Mbps LS operation
      • HS working @ 2V5 and FS / LS working @ 3V3 during normal mode
      • HS working @ 1V8 and FS / LS working @ 3V3 during under-drive mode
      Towards USB Controller
      • 12 pin ULPI SDR interface towards link side with clock output from USB2PHY. Additionally the PHY can be configured in 8-bit parallel UTMI+L3 and FS/LS serial mode towards controller.
      • OTG applications
      • pull-up and pull-down resistances
      • Data connect and charger detection logic to detect Deliverable
      • RTL Source Code
      • HDL based test bench and behavioral models
      • Test cases
      • Protocol checkers, bus watchers and performance monitors
      • Documentation & Design Guide
      • Verification Guide
      • Synthesis Guid

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