Your Complex IP Core Partner

    SD4.1 UHS- II PHY IP

    OverviewFeaturesRequest Datasheet
    This is a physical layer for SDHC/SDXC UHS-II complying SD 4.1 specification. This IP consists of two parts, one is a synthesizable digital part and the other is a mixed-signal SERDES.It supports 390Mbps to 1.56Gbps data rate, and both Full Duplex/Half Duplex modes.

    sd-4.1-uhs-II-phy-silicon-proven-ip-provider-in-Taiwan

     
    t2m-design-reuse t2m-chipestimate t2m-anysilicon
     
    • SD 4.1 compliant SDHC/SDXC UHS-II Physical Layer for Host
    • 16bit interface to Link layer
    • Supports both Full Duplex mode and Half Duplex mode
    • Wide range channel speed up to 1.56Gbps
    • Power saving mode
    • Configurable analog characteristics
    • Driver swing voltage
    • Testability:Built-in scan test
    • Area: <1mm2
    • Process: - SAMSUNG14nm 1.8V/0.8V
      Deliverables
    • Datasheet
    • Integration guideline
    • GDSII or Phantom GDSII
    • Layer map table
    • CDL netlist for LVS
    • LEF
    • Verilog behavior model
    • Liberty timing model
    • DRC/LVS/DRC results
    • Verilog RTL or netlist of digital part.

      Fill the form below, to receive the product datasheet in your inbox