Production Proven, Complex Semiconductor IP Cores

IP Cores

T2M Analog/Codec PGA for 24 Bit ADC IP Core

PGA for 24 Bit ADC IP Core

Description and Features

PGA for 24B 19Ksps ADC for Industrial process control high-performance PGA is highly integrable with our 24b ADC IP and hence can be combined to form a programmable gain Analog front end for precision application. The high-performance PGA can be programmed to have a gain of 1, 2, 4, 8, 16, 32, 64, or 128. The PGA consists of two stages. For a gain of 1, both stages are bypassed. For gains of 2 to 8, a single stage is used, whereas for gains greater than 8, both stages are used. The analog input range is ±VREF/gain Brief



  • Programmed to have a gain of 1, 2, 4, 8, 16, 32, 64, or 128

  • Suitable for forming complete AFE by combining with Vervesemi 24b ADC and work up-to 19,200 SPS

  • High resolution: ENOB 20.7 @ 10SPS at gain 128

  • Power Supply: Analog AVDD = unipolar 5V or bipolar +/- 2.5V, Digital DVDD 1.65 to 3.6V

  • -40C to 125C operating temperature range

  • Technology: SMIC 180nm


  • Medical AFE

  • Sensor measurement

  • Weigh scales

  • Industrial process control

  • Digital instrument


  • Datasheet

  • Hard Macro (GDSII)

  • Characterization Report (as applicable)

  • Abstract View (LEF)

  • Integration and Customer Support