XPHY Low power Chip to Chip SerDes IP in 28FDSOI

These IPs are targeted at applications requiring high speed, high bandwidth, low-power consumption, and low-latency interfaces.

• Low Power Chip-to-Chip SERDES
• From 10Gb/s to 11Gb/s
• Technology: 28FDSOI 8ML & 10ML
• Platform: 1 Data Slice and 1 Clock Slices
• RX: AC or DC coupling with low-power CTLE
• TX: Power-optimized resistive bridge driver
• Optimized for Low Power Chip-to-Chip SERDES Applications

• Ultra low voltage operation
• Optimized for low power Chip to Chip SERDES Applications

• IOT
• Wearables