Description
The MIPI Camera Serial Interface 2 (CSI-2) is an interface between a Camera and a host processor baseband application engine. This interface is defined by MIPI Alliance, which defines a series of modules in a MIPI compliant product. This MIPI CSI-2 Receiver is used in mobile and high–speed serial applications as a controller for receiving camera video and transmitting camera commands from/to MIPI CSI-2 Transmitter over MIPI lines. The camera data is encoded and then transmitted. The MIPI CSI-2 Transmitter along with our MIPI CSI-2 Receiver and MIPI DPHY provides a complete solution for decoding MIPI CSI-2 data.
Features
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Compliant with MIPI CSI Standard v2.x and MIPI D-PHY Standard v1.x, MIPI D-PHY Standard V2.x and MIPI C-PHY V1.x
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Programmable 1, 2, or 4 Data Lane Configuration.
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Configurable up to 4 Virtual Channels
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Operate in continuous and non-continuous clock modes.
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Color Modes: 16, 18, 24 and 36 bpp
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Color Formats: YUV420 8, 10bits and without CSPS and Legacy, YUV422 8, 10bits, RGB-888, 565, 666, 555 and 444. RAW6, 7, 8, 10, 12 and 14.
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Register configuration through CCI interface/APB interface
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Silicon-proven in multiple technology nodes
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Fully integrated and operational with PHYs from multiple PHY vendors.
Deliverables
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Configurable RTL Code
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HDL-based test bench and behavioral models
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Test cases
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Protocol checkers, bus watchers, and performance monitors
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Configurable synthesis shell
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Documentation
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Design guide
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Verification guide
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Synthesis guide
Benefits
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Data lane count
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Color modes
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Pixel interface width
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Application interface –Pixel or AXI
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Command FIFO depth
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Highly modular and configurable design
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Layered architecture
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Active low async reset
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Clearly demarcated clock domains
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Extensive clock gating support
Applications
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Mobile
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IOT
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Automotive
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Wearables
