Production Proven, Complex Semiconductor IP Cores

IP Cores

T2M Memory NVM Express Controller IP

NVM Express Controller IP

Description and Features

The NVM Express (NVMe) controller is compliant with NVMe 1.4 Base Specification. Most of NVMe feature supported to achieve well compatibility, SRIOV is implemented with compact design to provide highly flexibility. Friendly FW interface let NVMe Controller IP can easily achieve host command with high efficiency.

  • Compliant with NVMe Specification v1.4
  • Support SR-IOV up to 16 VFs
  • Support SQ/CQ/IV up to 132
  • Support INTR, MSI and MSI-X interrupt mechanisms
  • Support outstanding command number up to 512
  • Support multi-namespace up to 32
  • Support write stream number up to 7
  • Support LBA format 512B and 4KB
  • Support IO Queue Depth up to 64K
  • Support SRAM ECC error protection
  • Support Data path CRC error detection
  • Support Read out of order
  • Support arbitration mechanisms with RR and WRR
  • Support Boot Partition
  • Support Interrupt Coalescing
  • Support Host Memory Buffer (Engine is not inside NVMe Controller)


  • User Manual
  • Behavior model, and protected RTL codes
  • Synopsys library (LIB)
  • Test patterns and Test Documentation


  • Fully Compliant IP Core
  • Production Proven in multiple chip sets.