Production Proven, Complex Semiconductor IP Cores

IP Cores

T2M Verification IPs 200G Base-KR8/KR4/KR2 Ethernet VIP

200G Base-KR8/KR4/KR2 Ethernet VIP

Description and Features

The 200GBase-KR8/KR4/KR2 Ethernet Verification IP is compliant with IEEE 802.3bs specifications and verifies MAC-to-PHY layer interfaces of designs with a 200GBase-KR8/KR4/KR2 Ethernet interface. It can work with SystemVerilog, Vera, SystemC, E and Verilog HDL environment. 200GBase-KR8/KR4/KR2 verification IP is developed by experts in Ethernet, who have developed ethernet products in companies like Intel, Cortina-Systems, Emulex, Cisco. We know what it takes to verify a ethernet product. 200GBase-KR8/KR4/KR2 Verification IP is supported natively in SystemVerilog, VMM, RVM, AVM, OVM, UVM, Verilog, SystemC, VERA, Specman E and nonstandard verification env 200GBase-KR8/KR4/KR2 Verification IP comes with optional Smart Visual Protocol Debugger which is GUI based debugger to speed up debugging

200G-Base-KR8-KR4-KR2-Ethernet -VIP-silicon-proven-ip-supplier-in-china


  • Supports 200GBase-KR8/KR4/KR2 interfaces as per the specifications defined in IEEE 802.3bs
  • Supports scrambler
  • Supports FEC
  • Supports CDAUI_16
  • Supports CDMII
  • Supports backplane auto-negotation
  • Supports CDR for serial protocols
  • Supports MDIO slave and master model as per Clause 22 and Clause 45
  • Supports Glitch insertion and detection
  • Supports Pause frame generation and detection.
  • Supports all types of 200GBase-KR8/KR4/KR2 TX and RX errors insertion/detection. • Oversize, undersize, inrange, out of range Packet size errors • Missing SPD/EPD/SFD framing errors • SFD on wrong lane • CRC Error • Lane skew insertion • Invalid /D/ and /K/ character injection • Variable preamble and IPG insertion • Invalid block code insertion • Sync bit corruption • FEC error injection • Scrambler error injection
  • Comes with 200GBase-KR8/KR4/KR2 Tx BFM, 200GBase-KR8/KR4/KR2 Rx BFM, and 200GBase- KR8/KR4/KR2 PCS Monitor
  • Supports MDIO slave and master model as per Clause 22 and Clause 45
  • Monitor supports detection of all protocol violations.
  • Built in coverage analysis.
  • Callbacks in master and slave for various events
  • Status counters for various events in bus


  • Complete regression suite containing all the  testcases.
  • Examples showing how to connect variouscomponents, and usage of TXRX BFM and Monitor.
  • Detailed documentation of all class, task and function's used in verification env.
  • Documentation also contains User's Guide and Release notes.