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T2M › Verification IPs › USB 2.0 VIP

USB 2.0 VIP

Description and Features

USB 1.0/1.1/2.0 Verification IP provides an smart way to verify the USB 1.0/1.1/2.0 component of a SOC or a ASIC. It provides backward compatibility support for earliers versions 1.0, 1.1 and 2.0 of USB specifications. USB 1.0/1.1/2.0 VIP data transfer can be done at different speeds. Which intuitively involves high speed (480 Mbit/s), full speed(12 Mbit/s) or low speed(1.5Mbit/s).. It performs all possible protocol tests in a directed or a highly randomized fashion which adds the possibility to create most wide range of scenarios to verify the DUT effectively. This way it detects the violation of protocol completely. USB 1.0/1.1/2.0 Verification IP is supported natively in SystemVerilog, VMM, RVM, AVM, OVM, UVM, Verilog, SystemC, VERA, Specman E and non-standard verification env USB 1.0/1.1/2.0 Verification IP comes with optional Smart Visual Protocol Debugger (Smart ViPDebug), which is GUI based debugger to speed up debugging.

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Features
  • Compatible with USB 1.0, 1.1 and USB 2.0 specification
  • Supports Standard USB 2.0 interface, UTMI, UTMI+, ULPI and HSIC interfaces.
  • Standard DP/DM bus interface is supported.
  • Supports Link Power Management (LPM).
  • Supports constrained randomization of protocol attributes.
  • All USB2.0 transfer types (Control, Isochronous, Interrupt, Bulk) are supported.
  • Supports both transaction level (Setup, In, Out, Ping) and packet level (Token, Data, Handshake, SOF) transmission/reception.
  • Supports SRP and HNP compliance checking.
  • Provides SOF generation support.
  • Programmable inter packet and end-to-end delays.
  • Proficiency to generate random packets/transactions and respond to packets/transactions in directed or randomized fashion.
  • Combination of OTG device communication
    • OTG device to Embedded Host
    • Targeted Host to peripheral only B-device
    • OTG device to OTG device
  • Supported devices, Dual A, B device, Embedded host SRP only B device
  • Supported protocols SRP, HNP, HNP polling
  • Suspend/Resume/Remote wakeup
  • ADP
  • Supported speeds HS and FS
  • Supported feature selector
    • b_hnp_enable
    • a_hnp_support
    • a_alt_hnp_support
  • Support the all timeout condition
    • a_wait_vrise_tmout,
    • a_wait_vfall_tmout
    • a_wait_bcon_tmout, a_aidl_bdis_tmout
    • a_bidl_adis_tmout
  • Supports all types of error injection and detection. Errors include:
    • Corrupt Sync, PID, CRC-5, CRC-16, Corrupt Endpoint Address Byte
    • Corrupt Setup Payload Size
    • Corrupt Setup Stage Data Payload
    • Corrupt EOP byte, Bit stuffing error

Deliverables

  • Complete regression suite containing all the USB 1.0/1.1/2.0 testcases.
  • Examples showing how to connect various components, and usage of BFM and Monitor.
  • Detailed documentation of all class, task and function's used in verification env.
  • Documentation also contains User's Guide and Release notes.
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