Description and Features
USB 1.0/1.1/2.0 Verification IP provides an smart way to verify the USB 1.0/1.1/2.0 component of a SOC or a ASIC. It provides backward compatibility support for earliers versions 1.0, 1.1 and 2.0 of USB specifications. USB 1.0/1.1/2.0 VIP data transfer can be done at different speeds. Which intuitively involves high speed (480 Mbit/s), full speed(12 Mbit/s) or low speed(1.5Mbit/s).. It performs all possible protocol tests in a directed or a highly randomized fashion which adds the possibility to create most wide range of scenarios to verify the DUT effectively. This way it detects the violation of protocol completely. USB 1.0/1.1/2.0 Verification IP is supported natively in SystemVerilog, VMM, RVM, AVM, OVM, UVM, Verilog, SystemC, VERA, Specman E and non-standard verification env USB 1.0/1.1/2.0 Verification IP comes with optional Smart Visual Protocol Debugger (Smart ViPDebug), which is GUI based debugger to speed up debugging.

Features
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Compatible with USB 1.0, 1.1 and USB 2.0 specification
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Supports Standard USB 2.0 interface, UTMI, UTMI+, ULPI and HSIC interfaces.
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Standard DP/DM bus interface is supported.
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Supports Link Power Management (LPM).
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Supports constrained randomization of protocol attributes.
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All USB2.0 transfer types (Control, Isochronous, Interrupt, Bulk) are supported.
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Supports both transaction level (Setup, In, Out, Ping) and packet level (Token, Data, Handshake, SOF) transmission/reception.
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Supports SRP and HNP compliance checking.
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Provides SOF generation support.
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Programmable inter packet and end-to-end delays.
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Proficiency to generate random packets/transactions and respond to packets/transactions in directed or randomized fashion.
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Combination of OTG device communication
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OTG device to Embedded Host
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Targeted Host to peripheral only B-device
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OTG device to OTG device
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Supported devices, Dual A, B device, Embedded host SRP only B device
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Supported protocols SRP, HNP, HNP polling
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Suspend/Resume/Remote wakeup
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ADP
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Supported speeds HS and FS
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Supported feature selector
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b_hnp_enable
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a_hnp_support
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a_alt_hnp_support
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Support the all timeout condition
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a_wait_vrise_tmout,
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a_wait_vfall_tmout
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a_wait_bcon_tmout, a_aidl_bdis_tmout
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a_bidl_adis_tmout
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Supports all types of error injection and detection. Errors include:
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Corrupt Sync, PID, CRC-5, CRC-16, Corrupt Endpoint Address Byte
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Corrupt Setup Payload Size
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Corrupt Setup Stage Data Payload
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Corrupt EOP byte, Bit stuffing error
Deliverables
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Complete regression suite containing all the USB 1.0/1.1/2.0 testcases.
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Examples showing how to connect various components, and usage of BFM and Monitor.
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Detailed documentation of all class, task and function's used in verification env.
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Documentation also contains User's Guide and Release notes.