Description and Features
12-bit resolution, 320Msps sample rate Mixed-signal IP, nodes up to 28nm Silicon proven. Leading edge systems on chip (SoCs) for wireline networking, wireless communication, and automobile ADAS are made possible by these items. Our data converter (ADC and DAC) IP cores include resolutions ranging from 6 bits to 14 bits and sampling speeds ranging from a few MSPs to over 20GSPS.
Features
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Reduces noise and power consumption
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Increases ADC channel speed
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Provides accurate charge transfer without the need for calibration
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Relaxes op-amp gain, bandwidth, and offset requirements
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Simplifies high-performance analog designs
Deliverables
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CDL netlists
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Liberty timings
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Verilog description
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A full datasheet
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An integration note
Benefits
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Available in 28nm nodes
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Silicon Proven
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Excellent linearity
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Compact area
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Bandgap reference
Applications
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5G Wireless Infrastructure
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Automotive Ethernet
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Automotive LiDAR/RADAR
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Wireline Communication
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Wireless Communication
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Image Sensors
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Satellite Communication
