Description and Features
The Ethernet 40G,100G Verification IP is compliant with IEEE 802.3ba and IEEE 802.3bj specifications and verifies MAC-to-PHY and PHY-to-MAC layer interfaces of designs with a Ethernet 40G,100G interface. It can work with SystemVerilog, Vera, SystemC, E and Verilog HDL environment. Ethernet 40G,100G verification IP is developed by experts in Ethernet, who have developed ethernet products in companies like Intel, Cortina-Systems, Emulex, Cisco. We know what it takes to verify a ethernet product Ethernet 40G,100G Verification IP is supported natively in SystemVerilog, VMM, RVM, AVM, OVM, UVM, Verilog, System C, VERA , Specman E and nonstandard verification env Ethernet 40G,100G Verification IP comes with optional Smart Visual Protocol Debugger which is GUI based debugger to speed up debugging.