Display port 2.0 is the serial communication protocol developed by Video Electronics Standards Association(VESA) to support the video, audio and other data between a source device and sink device. Display port 2.0 VIP can be used to verify transmitter or Receiver device following the Display port basic protocol as defined in Display port 2.0. Display Port 2.0 Verification IP is supported natively in System Verilog, VMM, RVM, AVM, OVM, UVM, Verilog, System C, VERA, Specman E and non-standard verification env Display Port 2.0 Verification IP comes with optional Smart Visual Protocol Debugger which is GUI based debugger to speed up debugging.
Full Display port 2.0 source device and sink device functionality.
Supports backward compatibility with previous versions upto DPv1.4a
Supports control symbols for framing.
Supports Interlaced & non-interlaced video stream.
Supports main link, Aux link and Hot plug functionality.
Supports Fast and Full link training.
Supports skip the link training.
Supports Spread Spectrum clocking (SSC).
Supports I2C over AUX CH to access EDID, Display ID.
Supports Symbol Stuffing and Transfer Unit.
Supports ANSI8B10B encoding / decoding.
Supports 128b/132b channel coding
Supports Serialization and de-serialization.
Supports RGB, YCBCR444, YCBCR422, YCBCR420 and Y-only RAW color format.