12b, 640Msps, Current Steering DAC is high performance 12b current steering that supports data rate up-to 640Msps. Each DAC core consists of a current source matrix with quad switching architecture, controlled from an adaptive balanced driver and re-timing latches. It has all necessary calibration circuitry to provide excellent static and dynamic linearity performance. For each channel, there is an integrated multiplexer to multiplex 2 lanes of 12b data to achieve 640Msps effective data rate. Parallel digital interface is available to externally read and write calibration bits.
Technology: TSMC 22nm ULP process
Metal Scheme: 1P8M_5X1Z1U UT-AlRDL
12b Resolution, Fs = 640Msps
Programmable 20mA Differential Current Source
In-built Self-Calibration for mismatch for excellent linearity
Dynamic Performance@640Msps:
More than 60dB SFDR @110MHz
71dB SFDR @ 20MHz
IMD3 >-65dB @20MHz±1MHz
Selectable Internal and External load Terminations
Output Common Mode: 300mV ±5%
1.8V ±5% Analog Power Supply
0.8V ±5% Digital Core Power Supply
Integrated Voltage and Current References
Very low silicon area
INL ±2LSB, DNL ±1LSB
Gain Error 5% with internal load termination enabled
NSD > -160dbm/Hz
Area=0.696mm2
Applications:
Wideband wireless communication
5G, LTE
DOCSIS 3.1 CMTS
Instrumentations, Automatic Test Equipment ATE
Radars
