Description and Features
High performance, 12-bit resolution, 2 Gsps sample rate Pipeline ADC IP, nodes up to 28nm. Leading edge systems on chip (SoCs) for wireline networking, wireless communication, and automobile ADAS are made possible by these items. Our data converter (ADC and DAC) IP cores include resolutions ranging from 6 bits to 14 bits and sampling speeds ranging from a few MSPS to over 20GSPS.
Features
-
Reduces noise and power consumption
-
Increases ADC channel speed
-
Provides accurate charge transfer without the need for calibration
-
Relaxes op-amp gain, bandwidth, and offset requirements
-
Simplifies high-performance analog designs
Deliverables
-
CDL netlists
-
Liberty timings
-
Verilog description
-
A full datasheet
-
An integration note
Highlights
-
Available in 28nm nodes
-
Excellent linearity
-
Compact area
-
Complete subsystem
-
Bandgap reference
Applications
-
5G Wireless Infrastructure
-
Automotive Ethernet
-
Automotive LiDAR/RADAR
-
Wireline Communication
-
Wireless Communication
-
Image Sensors
-
Satellite Communication
