Description
	MIPI RFFE SPI Slave interface provides full support for the two-wire MIPI RFFE synchronous serial interface with SPI overlay, compatible with RFFE 2.1 and SPI Block Guide V04.01 specification. Through its RFFE compatibility, it provides a simple interface to a wide range of low-cost devices. MIPI RFFE SPI Slave IP is proven in multiple ASIC. The host interface of the MIPI RFFE/SPI can be simple interface or can be AMBA AHB, AMBA AHB-Lite, AMBA APB, AMBA AXI, AMBA AXI-Lite, Tilelink, OCP, VCI, Avalon, PLB, Wishbone or custom protocol.
	
	 
Features
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		Compliant with 3.0 MIPI RFFE Specification and SPI
 
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		Block Guide V04.01 Specification
 
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		Full MIPI RFFE Slave functionality.
 
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		Supports following frames • Command Frame • Data/Address Frame • No Response Frame
 
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		Supports extended register read/writes
 
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		Supports interrupt summary and identification command sequence
 
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		Support Trigger and Extended trigger modes
 
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		Support Masked write command sequence
 
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		Supports Timed Trigger
 
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		Supports Mappable Triggers
 
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		Support Synchronous read
 
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		Support Normal and Secondary operation mode
 
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		Support USID Programming Procedure 1,2 and 3
 
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		Support Group slave ID
 
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		Supports device enumeration
 
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		Supports Half-Speed Data Response (HSDR) Accesses
 
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		Supports Full Command Sequence at Half-Speed SCLK
 
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		Supports Delayed Read-back
 
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		Supports Reserved Register Allocations in Basic Address Space (0x1C – 0x1F)
 
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		Supports Reserved Register Allocations in Extended Address Space (0x20 – 0x3F)
 
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		Supports Write Slave State via PWR_MODE bits
 
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		Supports Read Slave State via PWR_MODE bits
 
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		Supports Read PRODUCT_ID, MANUFACTURER_ID and USID from reserved registers.
 
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		Support Interrupt capable slave
 
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		Supports Extended Frequency Range up to 52 MHz
 
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		Supports the following Error detections • Undefined command frame • Command frame with parity error • Command frame length error • Address frame with parity error • Data frame with parity error
 
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		Read and Writ of unused register
 
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		Read using the broadcast ID or a GSID
 
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		Full SPI Slave functionality
 
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		Supports following frames for SPI • Sleep Frame • Wakeup Frame • Write Frame • Read Frame
 
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		Supports 8 bit and 16 bit address for SPI.
 
	Deliverables
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		The MIPI RFFE SPI Slave interface is available in Source and netlist products.
 
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		The Source product is delivered in plain text Verilog. If needed VHDL, SystemC code can also be provided.
 
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		Easy to use Verilog Test Environment with Verilog Testcases
 
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		Lint, CDC, Synthesis, Simulation Scripts with waiver files
 
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		IP-XACT RDL generated address map
 
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		Firmware code and Linux driver package
 
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		Documentation contains User's Guide and Release notes.