12-bit resolution, 160Gsps sample rate Mixed-signal Ultra low power SAR ADC IP, nodes up to 28nm. Leading edge systems on chip (SoCs) for wireline networking, wireless communication, and automobile ADAS are made possible by these items. Our data converter (ADC and DAC) IP cores include resolutions ranging from 6 bits to 14 bits and sampling speeds ranging from a few MSPs to over 20GSPS.
Reduces noise and power consumption
Increases ADC channel speed
Provides accurate charge transfer without the need for calibration
Relaxes op-amp gain, bandwidth, and offset requirements
Simplifies high-performance analog designs
Benefits
Available in 28nm nodes
Excellent linearity
Compact area
Bandgap reference
Ultra-low power
Applications
5G Wireless Infrastructure
Automotive Ethernet
Automotive LiDAR/RADAR
Wireline Communication
Wireless Communication
Image Sensors
Satellite Communication
Deliverables
CDL netlists
Liberty timings
Verilog description
A full datasheet
An integration note
