Description
Our company offers a highly configurable and adaptable USB 2.0 OTG controller IP core, suitable for a wide range of applications. This controller adheres to the latest industry standards (USB 2.0 and USB OTG) and works seamlessly with existing Windows, Linux, and Android drivers in host mode, minimizing software development effort and risks. It boasts multiple interface options for various systems and offers the flexibility to connect single devices directly or manage multiple devices via hubs. Additionally, optional features like a high-performance DMA engine and a dedicated processor block can be included to optimize performance and reduce development time in device mode. Overall, this versatile controller empowers developers with a wide range of functionalities and customization options, catering to both basic and advanced needs.
Features
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The USB 2.0 OTG controller can be configured to support all types of USB transfers – bulk, interrupt and isochronous. In device mode, it can be dynamically configured to support a configurable number of endpoints, interfaces, alternate interfaces, and settings.
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The USB 2.0 OTG controller can be configured to support any combination of USB 2.0 interface speeds – LS (1.5 Mbps), FS (12.0 Mbps), HS (480 Mbps). Sample combinations are LS only, FS only, HS only, LS and FS only, or FS and HS only.
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The USB 2.0 OTG controller has full support for all low power features of USB specifications, supporting suspend, remote wakeup and Link Power Management states – L1, L2.
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The USB 2.0 OTG controller has full support for all test modes features which is required for obtaining USB-IF certification.
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The USB 2.0 OTG controller has full support for OTG features such as SRP, HNP and ADP along with software configurable options to turn these features on/off.
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Our USB controllers have been silicon proven in a wide range of products such as graphics controller, flash storage controllers, SATA bridges with support for bulk streaming, embedded hosts, docking stations, mobile application processors, smart TV, or hubs.
Benefits
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Highly modular and configurable design
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Layered architecture
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Fully-synchronous design
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Support for both sync and async reset
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Clearly demarcated clock domains
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Extensive clock gating support
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Multiple power well support
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Software control for key features
Applications
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Graphics controller
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Flash storage controller
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SATA bridges with support for bulk streaming
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Embedded hosts
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Docking stations
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Mobile application processors
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Smart TV
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Hubs
Deliverables
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Configurable RTL Code
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HDL-based test bench and behavioral models
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Test cases
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Protocol checkers, bus watchers, and performance monitors
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Configurable synthesis shell
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Design guide
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Verification guide
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Synthesis guide
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FPGA platform for pre-tape-out validation
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Reference firmware
