Production Proven, Complex Semiconductor IP Cores

Semiconductor IP Cores


T2M Automotive I2C Bus Interface IP

I2C Bus Interface IP

Description and Features

The I2C is a two-wire, bi-directional serial bus, which provides a simple and efficient method of short distance data transmission between many devices. The I2CMS core provides an interface between a microprocessor / microcontroller and I2C bus. It can work as a master or slave transmitter/receiver depending on a working mode determined by the microprocessor/microcontroller. The I2CMS core incorporates all features required by the latest I2C specification, including clock synchronization, arbitration, multi master systems and a high-speed transmission mode (the I2CMS supports all transmission speed modes). Built-in timer allows operation from wide range of clk frequencies. The I2CMS is technology independent, so either VHDL or VERILOG design can be implemented in variety of process technologies. Furthermore, it can be also completely customized in accordance to your needs. The I2CMS is delivered with fully automated test bench and complete set of tests, allowing easy package validation at each stage of SoC design flow.

Features
  • Conforms to the latest I2C specification
  • Slave & Master operation
  • Slave & Master transmitter
  • Slave & Master receiver
  • Supports 3 transmission speed modes
  • Standard (up to 100 kb/s)
  • Fast (up to 400 kb/s)
  • Fast Plus (up to 1 Mb/s)
  • High Speed (up to 3,4 Mb/s)
  • Allows operation from a wide range of input clock frequencies
  • Support for reads, writes, burst reads, burst writes, and repeated start
  • 7-bit addressing
  • No programming required
  • Simple interface allows easy connection to target device e.g. memory, LCD display, pressure sensors etc.
  • Fully synthesizable
  • Static synchronous design
  • Positive edge clocking and no internal tri-states
  • Scan test ready

Deliverables

  • Source code:
  • VHDL Source Code or/and
  • VERILOG Source Code or/and
  • FPGA Netlist
  • VHDL /VERILOG test bench environment
  • Active-HDL automatic simulation macros
  • Tests with reference responses
  • Technical documentation
  • Tech Specs

Benefits

  • Fully synthesizable
  • Static synchronous design
  • Positive edge clocking and no internal tri-states
  • Scan test ready
  • Getting a sillicon proven IP
  • Rapid prototyping and time-to-market reduction
  • Design risk elimination
  • Development costs reduction
  • Full customization
  • Technological independence (VHDL and Verilog)
  • Global sales network
  • Professional service

Applications

  • Embedded microprocessor boards
  • Consumer and professional audio/video
  • Home and automotive radio
  • Low-power applications
  • Communication systems
  • Cost-effective reliable automotive systems