AES bridge, a cryptographic coprocessor that complies with FIPS 197 Advanced Encryption Standard, employs the Rijndael encryption method to link APB, AHB, and AXI bus.
AES is a block cipher that is frequently used in security solutions, ranging from cloud servers to IoT devices. Performance and security are much improved when it is implemented in hardware as opposed to software.
Support for 128 and 256 key bit length
Support for ECB, CBC, CFB, OFB, CTR block cipher modes
Internal key expansion module
Flexible data read/write modes
Available system interface wrappers:
AMBA – APB / AHB / AXI Bus
Altera Avalon Bus
Xilinx OPB Bus
Deliverables
Source Code:
VERILOG test bench environment
Technical documentation
Synthesis scripts
Example application
Technical support
