Description
This is a high performance, ultra-low power 6-bit resolution, 5Msps sample rate Mixed-signal IP coresin advanced FinFET nodes up to 28nm. Leading edge systems on chip (SoCs) for wireline networking, wireless communication, and automobile ADAS are made possible by these items. Our data converter (ADC and DAC) IP cores include resolutions ranging from 6 bits to 14 bits and sampling speeds ranging from a few MSPS.
Features
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Reduces noise and power consumption
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Increases ADC channel speed
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Provides accurate charge transfer without the need for calibration
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Relaxes op-amp gain, bandwidth, and offset requirements
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Simplifies high-performance analog designs in nanometer CMOS
Benefits
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Available in finFETand 28nm nodes
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Excellent linearity
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Compact area
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Complete subsystem with:
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Bandgap reference
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Time interleaving error(s) correction
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Support for I/Q and array configurations
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AEC-Q100 Grade 2 compliant
Applications
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5G Wireless Infrastructure
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Automotive Ethernet
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Automotive LiDAR/RADAR
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Wireline Communication
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Wireless Communication
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Image Sensors
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Satellite Communication
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Low Power IoT
