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eCPRI Controller IP

Description and Features

eCPRI Controller interface provides full support for the two-wire eCPRI Controller synchronous serial interface, compatible with eCPRI specification v2.1. Through its eCPRI Controller compatibility, it provides a simple interface to a wide range of lowcost devices. eCPRI Controller IP is proven in FPGA environment.The host interface of the eCPRI Controller can be simple interface or can be AMBA APB, AMBA AHB, AMBA AXI, VCI, OCP, Avalon, PLB, Tilelink, Wishbone or Custom protocol. eCPRI Controller IP is supported natively in Verilog and VHDL.

 eCPRI-Controller-silicon-proven-ip-provider-in-china

 

Features
  • Compliant with eCPRI Specification v2.1
  • Supports complete eCPRI Tx/Rx Functioanlity
  • Supports various Ethernet Speeds - 10G/25G/40G/100G
  • Supports rich configuration to handle multi mode wireless systems
  • Supports Control and Management data transfer.
  • Supports data transfer through Ethernet/UDP/IP Interfaces.
  • Supports delay management.
  • Supports programmable packet queue to hold frames when eCPRI frame is in progress
  • Supports 8B/10B line coding
  • Supports following message types
  • IQ Data
  • IWF Start Up
  • IWF Operation
  • Generic Data Transfer
  • Fully synthesizable
  • Static synchronous design
  • Positive edge clocking and no internal tri-states
  • Scan test ready
  • Simple interface allows easy connection to microprocessor/microcontroller devices

Benefits

  • Companies designing in a single site can opt for a Single Site license option.

  • For companies operating across multiple sites, there's a Multi Sites license option available.

  • A Single Design license enables IP Core implementation in one FPGA bitstream or ASIC.

  • With an Unlimited Designs license, IP Core implementation is permitted across an unlimited number of FPGA bitstreams and ASIC designs.

Deliverables

  • The eCPRI Controller interface is available in Source and netlist products.
  • The Source product is delivered in plain text verilog or VHDL or SystemC source code
  • Integration testbench and tests
  • Scripts for simulation and synthesis with support for common EDA tools
  • Documentation contains User's Guide and Release notes
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