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SoC 白盒IP设计

USB 2.0 PHY IP

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Description

The DUSB2 is a hardware implementation of a full/high-speed peripheral controller that interfaces to an UTMI bus transceiver. The DUSB2 contains a USB PID and address recognition logic, state machines to handle USB packets and transactions, endpoints number recognition logic and endpoints FIFO control logic. The DUSB2 is designed to support 12 Mb/s "Full Speed" (FS) and 480 Mb/s "High Speed" (HS) serial data transmission rates. The design is technology independent and thus can be implemented in a variety of process technologies. This core strictly conforms to the USB Specification v 2.0. It is delivered with fully automated test bench and complete set of tests, allowing easy package validation at each stage of SoC design flow.

Features

  • Full compliance with the USB 2.0 specification
  • Full-speed 12 Mbps operation
  • High-speed 480 Mbps operation
  • Supports UTMI Transceiver Macrocell Interface
  • Synchronous RAM interface for FIFOs
  • Suspend and resume power management functions
  • 100% software compatible with industry standard 8051
  • Up to 256 bytes of internal (on-chip) Data Memory
  • Up to 64K bytes of internal (on-chip) or external (off-chip) Program Memory
  • Up to 16M bytes of external (off-chip) Data Memory
  • User programmable Program Memory Wait States solution for wide range of memories speed
  • User programmable External Data Memory Wait States solution for wide range of memories speed
  • Allows operation from a wide range of CPU clock frequencies
  • Fully synthesizable
  • Static synchronous design
  • Positive edge clocking
  • No internal tri-states
  • Lite design, small gate count and fast operation
  • Scan test ready
  • Applications

  • Portable flash memory device
  • Digital audio player
  • Card reader
  • Digital camera
  • Deliverables

  • Source code:
  • HDL Source Code or/and
  • VERILOG Source Code or/and
  • Encrypted, or plain text EDIF
  • VHDL & VERILOG test bench environment
  • Active-HDL automatic simulation macros
  • ModelSim automatic simulation macros
  • Tests with reference responses
  • Technical documentation
  • Installation notes
  • HDL core specification
  • Datasheet
  • Synthesis scripts
  • Example application
  • Technical support
  • IP Core implementation support
  • 3 months maintenance
  • Delivery the IP Core updates, minor and major versions changes
  • Delivery the documentation updates
  • Phone & email support

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T2M提供高质量的已验证IP,包括各种模拟/混合信号,RF,数字和SW系统的解决方案。可用于通信,消费类电子和计算机产品的关键组成部分,包括IoT系统,可穿戴设备,蜂窝电话,平板电脑,M2M,RCU,机顶盒,电视机,DVD播放器和PC芯片组。 无论是fab工厂的工艺 /节点的移植还是特定的系统功能,T2M所提供的IP可以进行设计定制化修改以适合客户的具体要求。