Select Language

Your Complex IP Core Partner

    V-by-One / LVDS Tx IP

    OverviewFeaturesRequest Datasheet

    V-by-One® HS technology targets a high speed data transmission of video signals based on internal connection of equipment. V-by-One® HS Standard defines the specifications to develop a transmitter and receiver .This Supports up to 4Gbps/lane; and Available 8-lane PHY and 16-lane PHY for Tx and Rx. A physical layer IP for LVDS transmitter. This IP consists of 20-lane (4 x 4D1C) LVDS drivers, and supports up to 1.5Gbps data rate.

    t2m-design-reuse t2m-chipestimate t2m-anysilicon
    • LVDS compliant Tx
    • 4 groups of 4-Data
    • 1-Clock channels Each lane/group can be turned on/off individually Data/Clock can be assigned to any lane within the group
    • Differential polarity can be flip per lane
    • Supports from 168Mbps to 1.5Gbps data rate
    • Supports reduced swing mode
    • X7 Multiplier PLL for serial clock generation
    • Configurable analog characteristics
    • PLL loop filter
    • PLL VCO gain
    • Differential voltage Common-mode voltage
    • Pre-emphasis strength
    • Datasheet
    • Integration guideline
    • GDSII or Phantom
    • GDSII Layer map table
    • CDL netlist for LVS
    • LEF Verilog behavior model
    • Liberty timing model DRC/LVS/ERC results
    • Smart Phone
    • Tablet
    • PC
    • Car navigation
    • Smart TV
    • Digital Still Camera
    • HD Camera

      Fill the form below, to receive the product datasheet in your inbox