T2MIP, the global independent semiconductor IP Cores provider & Technology experts, is pleased to announce the immediate availability of its partner’s Silicon Proven and mature MIPI DSI & CSI Tx-Rx Controller IP Cores with matching PHYs in major Fabs and Nodes as small as 7nm. These MIPI Cores has been in Production in multiple chipsets with superspeed Display and Camera interface for High quality resolutions upto 4K for Next Gen products.
MIPI DSI Tx-Rx Controller IP Cores a flexible, quick interface for platforms including smartphones, tablets, computers, cars, and other screens and MIPI CSI Tx-Rx Controller IP Cores is a commonly used, quick protocol for sending static and moving pictures from cameras to application processors. Both being an interface used in mobile and high–speed serial applications to decode display and image data and use it for subsequent processing. The latest technology in MIPI CSI and DSI has paved the way for a new generation of UHD (Ultra High Definition) consumer end Products..
MIPI DSI Tx-Rx Controller IP Cores is able to handle up to 2.5 Gbps per data lane of D-PHY (V2.0), 10Gbps in 4 Lanes which is made possible by its Programmable Data Lane Configuration. Additionally, it supports capabilities like forward and reverse communication, support for command and video mode, burst and non-burst modes, pulse and event modes, thanks to its extremely flexible architecture. It also has a Layered design with a variety of Color options, including support for Display Stream Compression and 16, 18, and 36 bpp (DSC). It provides a solution of up to 4 configurable virtual channels all with lossless data transmission with Extensive clock gating support:
This MIPI CSI Tx-Rx Controller IP Cores high speed serial interface protocol for integration of camera subsystems such as RAW image sensors, SOC cameras, Image Signal Processors (ISP) and bridge devices with host processor such as an application processor in mobile terminal application. Compliant with MIPI CSI3 V1.0, MIPI M-PHY spec v2.0. MIPI UniPro Spec v1.8 with upto 4 MPHY lanes configurable per direction [10Mbps – 5.8Gbps per lane supported]. The CSI Controller includes support for one dedicated CPORT for CPC and 2 CPORT for Pixel/embedded data transmission. For a true next Gen feel, it allows for Interleaving of pixel data from two different Sources.
MIPI DSI and CSI Controller IP cores along with MIPI D-PHY IP Cores has been used in semiconductor industry’s Smartphones, Surveillance cameras, Automotive Camera, Smart watch displays, digital TVs, handheld computers, personal computers, and other industrial uses.
In addition to MIPI D-PHY IP Cores, T2M ‘s broad silicon Interface IP Core Portfolio includes USB, HDMI, Display Port, MIPI (UniPro, UFS, RFFE, I3C), PCIe, DDR, 1G Ethernet, V-by-One, programmable SerDes, OnFi and many more, available in major Fabs in process geometries as small as 7nm. They can also be ported to other foundries and leading-edge processes nodes on request...
Availability: These Semiconductor Interface IP Cores are available for immediate licensing either stand alone or with pre-integrated Controllers and PHYs. For more information on licensing options and pricing please drop a request at / MailTo
About T2M: T2MIP is the global independent semiconductor technology experts, supplying complex semiconductor IP Cores, Software, KGD and disruptive technologies enabling accelerated development of your Wearables, IOT, Communications, Storage, Servers, Networking, TV, STB and Satellite SoCs. For more information, please visit: www.t-2-m.com
