T2MIP, the global independent semiconductor IP Cores provider and technology experts, is delighted to announce the instant availability of its partner’s Production proven LIN Controller IP Core. This IP core solution is available with ASIL B, ASIL C, and ASIL D automotive safety packages.
An interface between a microprocessor/microcontroller and a LIN bus is provided by the LIN core. Depending on the work mode selected by the microprocessor/microcontroller. It is possible to send and receive LIN messages compatible with LIN 1.3, LIN 2.1, and LIN 2.2A using a LIN controller with UART half-duplex improved capabilities that offer transmission speeds between 1kb/s and 20kb/s. The reported information status encompasses both the nature and state of transfer operations executed by the LIN, along with an extensive array of LIN error conditions, which encompass overrun, framing, parity, and timeout issues.
LIN bridge to APB, AHB, and AXI bus, it is a softcore of the Local Interconnect Network. The mentioned information status comprises a wide range of LIN error circumstances (overrun, framing, parity, and timeout), as well as the kind and state of transfer operations carried out by the LIN. A customizable timer included in our Core enables the detection of synchronization and timeout problems. The RTL-level description of the LIN enables its intended application in FPGA and ASIC technologies.
This advanced solution has been crafted in compliance with ISO26262-10 Safety Element. Optionally, it can be further enhanced with essential safety mechanisms and offers comprehensive safety documentation. This documentation encompasses all the ISO26262 soft IP SEooC mandated work products, including a thorough Failure Modes Effects and Detection Analysis (FMEDA) analysis. The documentation also provides step-by-step instructions to facilitate the seamless integration of the IP into the customer's system and to facilitate system-level safety analysis. Importantly, all safety-related work products have undergone rigorous scrutiny via third-party, independent audits for added assurance.
These IP Cores are straight forward to utilize, thanks to simple licensing procedures that do not need royalty-per-chip payments. There are two formats of the delivered IP core where you can choose either VHDL or Verilog RTL synthesizable source code (HDL Source Code) or FPGA EDIF/NGO/NGD/QXP/VQM (Netlist).
Availability: These IP Cores are available for immediate licensing. For more information on licensing options and pricing please drop a request / MailTo .
About T2M: T2MIP is the global independent semiconductor technology experts, supplying complex semiconductor IP Cores, Software, KGD and disruptive technologies enabling accelerated development of your Wearables, IOT, Communications, Storage, Servers, Networking, TV, STB and Satellite SoCs. For more information, please visit:on www.t-2-m.com
