T2MIP, the global independent semiconductor IP Core provider and technology expert, is pleased to announce the immediate availability of its partner’s silicon-proven and mature USB 3.2 OTG Controller and PHY IP Cores in major fabs and process nodes as small as 12nm. This USB solution is a cornerstone for high-speed data transfer in industrial and consumer applications, with an outstanding mass-production track record across a wide range of products.
USB 3.2 OTG Controller and PHY IP transceiver core supports OTG, host, and peripheral applications and can be configured for USB 3.2 interface speeds up to 20Gbps (dual lane) or 10Gbps. In device mode, it can be dynamically configured to support a configurable number of endpoints, interfaces, and configurations. In host mode, it can optionally support hubs. The complete USB 3.2 IP solution enables driver reuse, minimizing software development overhead and reducing risks associated with custom bare-metal driver development.
USB 3.2 OTG Controller IP cores can be configured to support all USB transfer types including Bulk, Interrupt, and Isochronous. It fully supports low-power USB features such as Suspend, Remote Wakeup, USB 3.0 and USB 2.0 Link Power Management states. The controller also supports USB 2.0 test modes, USB 3.0 compliance, and USB 3.0 loopback modes required for USB-IF certification. OTG features such as RSP, SRP, HNP, and ADP are included, with software-configurable on/off options.
USB 3.2 PHY IP Cores comply with USB 3.2 and USB 2.0 electrical specifications and support both UTMI+ and PIPE 4.0 standards. The PHY includes high-speed mixed-signal circuitry for Gen2 and Gen1 traffic and is backward compatible with High-Speed (480Mbps), Full-Speed (12Mbps), and Low-Speed (1.5Mbps) data rates. The physical layer integrates an active switch to support bi-directional plug orientation and USB Type-C functionality. With clock inputs from a 25MHz crystal oscillator or external core clock sources, it is available in both wire-bond and flip-chip package types.
USB 3.2 OTG Controller & PHY IP cores in 12nm, 28nm, and 40nm nodes have been widely used in semiconductor industry applications such as scanners, digital cameras, removable media drives, mass-storage devices, display and docking systems, cloud computing, automotive electronics, consumer devices, smartphones, and other industrial applications.
In addition to USB 3.2 Controller & PHY IP Cores, T2M’s broad silicon interface IP portfolio includes HDMI, DisplayPort, MIPI (CSI, DSI, UniPro, UFS, RFFE, I3C), PCIe, DDR, 1G Ethernet, V-by-One, Programmable SerDes, ONFI and many more. These are available in major fabs in process geometries as small as 7nm and can also be ported to other foundries and leading-edge process nodes upon request.
Availability: These semiconductor interface IP cores are available for immediate licensing either standalone or with pre-integrated controllers and PHYs. For licensing options and pricing, please send meeting requests @ contact@t-2-m.com.
About T2M: T2MIP is a global independent semiconductor technology expert, supplying complex semiconductor IP cores, software, KGD, and disruptive technologies that enable accelerated development of wearables, IoT, communications, storage, servers, networking, TV, STB, and satellite SoCs.
