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Enhance Your High-Density Data Processing Capabilities To New Heights With The USB 3.2, PCIe 3.1, SATA 3.2 Combo PHY IP Core Interface In 28HPC+/HPC Process Technology!!

04 Jul, 2022

T2MIP, the global independent semiconductor IP Cores provider & Technology experts, is pleased to announce the licensing of its partner’s USB 3.2/ PCIe 3.1/ SATA 3.2 Combo PHY IP Core in 28HPC+/HPC process nodes with matching Combo Controller IP Cores which is silicon proven and in mass production.
The combo PHY consist of Universal Serial Bus (USB) compliant with the USB 3.2 (Backward Compatible with High-speed and Full speed), Peripheral Component Interconnect Express (PCIe) compliant with PCIe 3.1 Base Specification with support of PIPE v4.4 interface spec and Serial ATA (SATA) compliant with SATA 3.2 Specification. The Combo PHY can run on USB mode, PCIe mode or SATA mode as required by the customer. It is a very reliable and trusted product which also provides a robust testability by low-cost Build-In-Self-Test (BIST) and near/far end loopback at analog/digital interface.
SATA 3.2 Combo PHY IP
The PHY is widely applicable for various scenarios due to its configurable low power mode setting. This low power consumption is achieved due to support of additional Embedded low jitter PLL control, reference clock control, and embedded power gating control. The USB 3.2/ PCIe 3.1/ SATA 3.2 Combo PHY IP Core is compliant with UTMI 1.05 and PIPE 4.4 specifications. The USB 3.2 Combo PHY IP Core is also able to support x2 Physical Lane width and a 32-bit parallel interface. The Combo PHY IP Core supports data transfer rates of 5.0 GT/s and 10.0 GT/s (USB); 2.5 GT/s, 5.0 GT/s and 8.0 GT/s (PCIe); 1.5 GT/s, 3.0 GT/s and 6.0 GT/s (SATA)
The USB 3.2/ PCIe 3.1/ SATA 3.2 Combo Controller IP Core provides a great level of controllability and ensures easy integration with the PHY. With features such as support for simultaneous Multiple IN transfers, PTM Implementation and Bulk Streaming, the Controller allows for a high-density data processing through the PHY. It also boasts a configurable PIPE Interface: 8, 16, 32 bits according to requirements….
USB 3.2/ PCIe 3.1/ SATA 3.2 Combo PHY IP Core along with matching Controller IP Cores are available independently or pre-integrated as a fully validated and integrated solution. The IP Core has been used in semiconductor industry’s Smart TV, Set top Box, PC Storage, Data Storage, Multimedia Devices, Cellular Electronics, and other Consumer Electronic products worldwide..
In addition to USB 3.2/ PCIe 3.1/ SATA 3.2 Combo PHY IP Core in 28HPC+ process nodes, T2M ‘s broad silicon Interface IP Core Portfolio includes other versions of USB, PCIe, Serial ATA, HDMI, Display Port, MIPI, DDR, 1G Ethernet, SerDes, SD/eMMC and many more Controllers with matching PHYs, available in major Fabs in process geometries as small as 7nm. They can also be ported to other foundries and leading-edge processes nodes on request.
About T2M: T2MIP is the global independent semiconductor technology experts, supplying complex semiconductor IP Cores, Software, KGD and disruptive technologies enabling accelerated development of your Wearables, IOT, Communications, Storage, Servers, Networking, TV, STB and Satellite SoCs. For more information, please visit:
Availability: These Semiconductor Interface IP Cores are available for immediate licensing either stand alone or with pre-integrated Controllers and PHYs. For more information on licensing options and pricing please drop a request / MailTo