USB 3.1 Gen 1 / Gen 2 PHY
- Wireless
- Bluetooth/BLE
- BLE
- Bluetooth
- BT Dual Mode v5.2 RF PHY IP in TSMC 22nm
- BT Dual Mode v5.2 RF PHY IP in GF 22fdx
- BT Dual Mode 5.2 HW Linklayer / BaseBand Controller IP
- BT Dual Mode v5.2 Software Stack & Profiles IP
- BT Dual Mode v5.0 Software Stack & Profiles IP
- Bluetooth MESH v1.1 Software IP
- Bluetooth Dual Mode v4.2 RF Transceiver IP
- Bluetooth Dual Mode SoC White Box IP
- LE Audio
- Cellular
- Audio
- Broadcast
- Lighting
- SerDes
- Interface
- DDR
- PCI Express
- USB
- Controllers
- USB 4.0 Device Controller IP
- USB 4.0 Host Controller IP
- USB 4.0 Hub Controller IP
- USB 3.2 Device Controller IP
- USB 3.2 OTG Controller IP
- USB 3.2 Dual Mode Controller IP
- USB 3.1 Device Controller IP
- USB 3.1 Host Controller IP
- USB 3.1 Hub Controller IP
- USB 3.1 Vision Controller IP
- USB 3.1 Gen1 SSIC Controller IP
- USB 3.0 Device Controller IP
- USB 3.0 Host Controller IP
- USB 3.0 Hub Controller IP
- USB 3.0 Dual Mode Controller IP
- USB 3.0 OTG Controller IP
- USB 3.0 Audio Class Device Controller IP
- USB 2.0 Device Controller IP
- USB 2.0 Host (xHCI) Controller IP
- USB 2.0 Audio Class Device Controller IP
- USB 2.0 OTG Controller IP
- USB 1.1 Device Controller IP
- TSMC 16FF+
- TSMC 22ULP
- TSMC 28HPC+
- TSMC 40LP /LL
- UMC 28HPC+/ HPC
- UMC 40LP
- UMC 55SP /EF
- SMIC 14SF+/ SF++
- SMIC 40LL
- SMIC 55LL
- Controllers
- MIPI
- Controllers
- MIPI UFS v3.1 Device Controller IP
- MIPI UFS v3.1 Host Controller IP
- MIPI UFS v2.1 Host Controller IP
- MIPI CSI-3 Device v1.1 Controller IP
- MIPI CSI-3 Host v1.1 Controller IP
- MIPI CSI-2 Tx v2.0 Controller IP
- MIPI CSI-2 Rx v2.0 Controller IP
- MIPI CSI-2 Rx v1.3 Controller IP
- MIPI CSI-2 Tx v1.3 Controller IP
- MIPI CSI-2 Tx v1.1 Controller IP
- MIPI CSI-2 Rx v1.1 Controller IP
- MIPI DSI2 Tx v1.1 Controller IP
- MIPI DSI2 Rx v1.1 Controller IP
- MIPI DSI Tx v1.2 Controller IP
- MIPI DSI Rx v1.2 Controller IP
- MIPI Unipro v1.8 Controller IP
- MIPI Unipro v1.6 Controller IP
- MIPI I3C Master v1.1 Controller IP
- MIPI I3C Slave v1.1 Controller IP
- MIPI SoundWire Master v1.2 Controller IP
- MIPI SoundWire Slave v1.2 Controller IP
- TSMC 12FFC
- TSMC 22ULP
- TSMC 28HPC+
- UMC 28HPC+
- UMC 40LP
- UMC 55 SP
- SMIC 55 LL
- Controllers
- HDMI & DP
- TSMC 12FFC
- TSMC 28HPC+
- HDMI v2.1 Tx-Rx Phy & Controller IP
- HDMI v2.1 Tx PHY & Controller IP
- HDMI v2.1 Rx PHY & Controller IP
- HDMI v2.0 Tx PHY & Controller IP
- HDMI v2.0 Rx PHY & Controller IP
- HDMI-DP Combo Rx PHY IP
- Display Port v1.4 Tx PHY & Controller IP
- Display Port v1.4 Rx PHY & Controller IP
- V-by-One / LVDS Tx IP
- V-by-One / LVDS Rx IP
- TSMC 40LP
- TSMC 65LP / 55LP
- TSMC 65GP / 55GP
- TSMC 90G / 85G
- TSMC 130G / 110G
- UMC 28HPC/HPC+
- UMC 40LP
- UMC 65SP / 55SP
- UMC 110AE
- UMC 130HS
- SMIC 40LL
- SMIC 65LL / 55LL
- SMIC 65G / 55G
- GF 22nm
- GF 28SLP
- GF 65LPe / 55LPe
- Samsung 28FDSOI
- ST 28FDSOI
- STMicro CMOS 40
- IDM 180nm /150nm
- Ethernet
- Video & Graphics
- Analog
- Services
OverviewFeaturesRequest Datasheet
This PHY IP supports both USB3.1 Gen1 & Gen2.

This USB3.1 Gen2 PHY IP implements USB3.1 Gen2 transceiver and can be used as host and device. PHY IP supports USB3.1 Gen2 high speed data rate up to 10Gbps with integrated mixed signal circuit, also supports Gen1 5Gbps data rate

- Support PHY interface (PIPE4.3) enables multiple IP sources for USB3 MAC layer
- Supports 5.0Gbps and 10Gbps serial data transmission rate
- Supports 16-bit or 32-bit parallel interface
- Data and clock recovery from serial stream
- Support 8b/10b encoder/decoder (Gen1), 128/132 encoder/ decoder (Gen2) and error indication
- Tunable receiver detection to detect worse case cables
- Low Frequency Periodic Signaling (LFPS) transmission and reception
- Support SSCG function to reduce EMI effects with tunable down-spread amplitude
- Selectable TX margining, TX de-emphasis and signal swing values
- Built-in-self-test with internal Loopback test option
- Programmable analog circuit parameter adjustment and internal test control
- Compliant with USB3.1 Gen2 base specification
- GDSII & layer map
- Place-Route views (.LEF)
- Liberty library (.lib)
- Verilog behavior model
- Netlist & SDF timing
- Layout guidelines, application notes
- LVS/DRC verification reports
- Test patterns and Test Documentation