T2MIP, the global independent semiconductor IP Cores provider & Technology experts, is pleased to announce the immediate availability of its partner’s SD Association compliant SDIO Host and Device Controller IP Cores which are proven and in mass production with full certification and boasts high speed and low power interlink for I/O.

An SDIO (Secure Digital Input Output) Controller is an extension of the SD specification to cover I/O functions. The SDIO Host and Device Controller IP Core is full-featured, easy-to-use, synthesizable design that is easily integrated into any SoC or FPGA development. It can also support a variety of host bus interfaces for easy adoption into any design architecture – AHB, APB, AXI, OCP, Wishbone, VCI, Avalon PLB, Wishbone, Tilelink or custom buses. The Controller supports 1-bit, 4-bit, 8-bit SD bus mode and SPI Bus mode. SDIO Host and Device Controller IP Core is delivered in Verilog RTL that can be implemented in an ASIC or FPGA. It is also validated in using FPGA. The core includes RTL code, test scripts and a test environment for complete simulation.

The SDIO Device Controller IP Core is compliant with Part 1 Physical Layer Specification Version 3.01 and Part E1 SD Specification version 3.00 and earlier versions. With CRC7 checking/generation for command/response, CRC16 checking/generation for data transfer makes it efficient and worthy of its name for Secure Digital. It can also support different memory capacities such as  · Standard Capacity SD Memory Card (SDSC): Up to 2 GB, · High-Capacity SD Memory Card (SDHC): More than 2GB and up to 32GB, · Extended Capacity SD Memory Card (SDXC): More than 32GB and up to and including 2TB. Supports switch function, direct commands during data transfer and Asynchronous Interrupt to Host Controller makes it simple and highly controllable.

SDIO Host Controller IP Core is compliant with SD Host Controller Specification version 6.0, SDIO Physical Specification version 6.10 and Part E1 SDIO specification 4.10. It Supports SDMA, ADMA2 and ADMA3 modes along with all features of Part 1 eSD (Embedded SD) addendum version 2.10. Single byte, Single block, Multi block (finite and infinite) transfers make it flexible for use. The Controller also enables the support for SD Memory, SD I/O card, Combo card. The Host and Device Controllers both support default and high-speed modes along with SDR12, SDR25, DDR50, SDR 50 and SDR104 modes that enables command queue, suspend and resume, and card detection.

SDIO Host and Device Controller IP Cores have been used in semiconductor industry’s Cellular Electronics, Cameras, Multimedia Devices, and other Consumer Electronics …

In addition to SDIO Host and Device Controller IP Cores, T2M ‘s broad silicon Interface IP Core Portfolio includes USB, PCIe, Serial ATA, HDMI, Display Port, MIPI, DDR, 10/100/1000 Ethernet, V by One, programmable SerDes, SD/eMMCs and many more Controllers with matching PHYs, available in major Fabs in process geometries as small as 7nm. They can also be ported to other foundries and leading-edge processes nodes on request.

Availability: These Semiconductor Interface IP Cores are available for immediate licensing either stand alone or with pre-integrated Controllers and PHYs. For more information on licensing options and pricing please drop a request / MailTo

About T2M: T2MIP is the global independent semiconductor technology experts, supplying complex semiconductor IP Cores, Software, KGD and disruptive technologies enabling accelerated development of your Wearables, IOT, Communications, Storage, Servers, Networking, TV, STB and Satellite SoCs. For more information, please visit: www.t-2-m.com