Description
The HDMI 1.4b Tx Whitebox PHY IP in ST 28FDSOI provides a silicon-proven transmitter solution for high-definition multimedia SoCs. Supporting pixel clocks from 25 MHz to 250 MHz, HD video through 1080p, HDMI 3D formats, and 24-, 30-, and 36-bit Deep Color, the PHY enables reliable TMDS connectivity for televisions, set-top boxes, automotive displays, media players, and embedded multimedia systems. Its Whitebox license provides unlimited reuse, full design-modification rights, and the flexibility to optimize or migrate the PHY for future semiconductor processes.
Features
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Designed for HDMI 1.4b transmitter applications
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Supports TMDS video, audio, and control-data transmission
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Supports pixel-clock operation from 25 MHz to 250 MHz
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Supports DTV formats from 480i through 1080p
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Supports HDMI 1.4 3D video formats
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Supports 24-, 30-, and 36-bit Deep Color
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Three differential TMDS data channels and one clock channel
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Programmable transmitter output swing
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Programmable transmitter pre-emphasis
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Adjustable PLL bandwidth and VCO characteristics
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Optimized for low-power and compact-area implementation
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Whitebox license with unlimited usage and full modification rights
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Supports customization, derivative
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development, and process porting
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Silicon-proven in ST 28FDSOI
Deliverables
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Detailed Datasheet
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Verilog behaviour model (A) for simulation
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Liberty (.db/.lib) for synthesis, STA, and equivalence
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checking
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CTL / CTLDB for DFT
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SPF — Standard Test Interface Language (STIL)
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Procedure File — for ATPG
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LEF for APR
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CDL for LVS connection
