Description
The MIPI SPMI v2.0 Peripheral Controller Whitebox IP provides a compact, low-latency two-wire control interface for PMICs and power-management peripherals. It supports SPMI command and data frames, ACK/NACK responses, peripheral-originated requests, extended-register operations, wakeup, authentication, and Device Descriptor Block commands. The technology-independent RTL can be configured for different application interfaces and register architectures and is supplied with full Whitebox modification and unlimited reuse rights.
Features
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Supports MIPI SPMI Specification v2.0 and v1.0
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Complete SPMI peripheral-side functionality
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Two-wire synchronous SCLK and SDATA interface
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Supports command, data/address, and noresponse frames
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Supports SPMI v2.0 ACK and NACK responses
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Peripheral requests through Alert and Request bits
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Supports peripheral-request hold
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Optional input-glitch suppression
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Extended-register read and write commands Wakeup-command handling
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Authentication command-sequence support
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Device Descriptor Block command support
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Configurable internal application or host interface
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Fully synthesizable, scan-ready Whitebox RTL
Deliverables
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Verilog behaviour model (A) for simulation
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Liberty (.db/.lib) for synthesis, STA, and equivalence
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checking
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CTL / CTLDB for DFT
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SPF — Standard Test Interface Language (STIL)
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Procedure File — for ATPG
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LEF for APR
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CDL for LVS connection
