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TDS550

Description

This is 64-bit vector processor designed specifically for artificial intelligence and machine learning, delivering high-performance computing while optimizing energy efficiency. Developed based on the RISC-V standard vector extension (RVV 1.0) and the Attached Matrix extension, it offers a peak computing performance of 4 TOPS (at 22nm and 1 GHz) and efficiently meets the demands of AI applications.

 

Features

  • ISA: RISC-V 64-bit IMACBFDV_Zfh_Zfbfmin_CMO_Zicond_AME

  • Multi-Core: Machine-mode, User-mode

  • Security: Supports Smepmp, optional PPMA, PMP Region can be configured from 0 to 64

  • Pipeline: 8-stage superscalar in-order pipeline, 2-way decode

  • Vector: Supports RVV 1.0, with a maximum width of 1024-bit

  • AME: Supports Attached Matrix Extension (configurable 8x16x32; configurable SRAM from 128 KB to 1 MB)

  • TIM: ITIM and DTIM, with configurable sizes from 0 KB to 128 KB, ECC optional

  • L1 I$: Size is configurable (8K/16K/32K/64KB), ECC optional

  • L1 D$: Size is configurable (8K/16K/32K/64KB), ECC optional

  • Interrupt: CLINT, APLIC (AIA + PLIC)

  • Debug: Debug module: supports JTAG/cJTAG

    • Memory Port: 128-bit AXI master interface

    • Peripheral Port: 64-bit AXI master interface

  • Debug:

    • VPU Stream Port: 1024-bit AXI master interface

    • AMU Stream Port: 512-bit AXI master interface

    • Front Port: 64-bit AXI slave interface

  • CoreMark (CoreMarks/MHz): 5.20

  • Dhrystone-Legal (DMIPS/MHz): 3.50

Applications

  • Intelligent security, embodied AI, and intelligent industrial control, etc.

Deliverables

  • IP Package

    • Synthesizable RISC-V CPU IP core

  • Simulation Environment with test case demo

  • IP User Manual / Integration Manual / Simulation Manual / Functional Safety Manual (if supported)

  • FPGA Development Board Support Package

    • FPGA board

    • User manual

    • Online technical support

    • Offline technical support

  • IDE Package

    • IDE (Windows + Linux versions)

    • User guides

    • Pre-built tool suite

    • Pre-built project demos

    • Automated debug and trace process

  • Toolchain Package

    • GCC13/GCC14-based toolchain

    • Compiler, assembler, linker

    • QEMU simulator

    • GDB debugger

    • Basic libraries

  • SDK

    • MCU SDK (EMSIS, RTOS support, RTOS interrupt nesting support, etc.) for 32-bit IPs

    • Linux SDK (Linux OS support) for 64-bit IPs

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